Datasheet AD7782 (Analog Devices) - 10

AD7782 Bipolar Configuration/Output Coding
without introducing gain errors in the system. Deriving the refer- The analog inputs on the AD7782 accept bipolar input voltage ence input voltage across an external resistor will mean that the ranges. Signals on the AIN(+) input of the ADC are referenced reference input sees a significant external source impedance. Exter- to the voltage on the respective AIN(–) input. For example, if nal decoupling on the REFIN pins would not be recommended in AIN(–) is 2.5 V and the AD7782 is configured for an analog input this type of circuit configuration. range of ± 160 mV, the analog input range on the AIN(+) input
Grounding and Layout
is 2.34 V to 2.66 V (i.e., 2.5 V ± 0.16 V). Since the analog inputs and reference inputs on the ADC are The coding is offset binary with a negative full-scale voltage differential, most of the voltages in the analog modulator are common- resulting in a code of 000 . 000, a zero differential voltage mode voltages. The excellent common-mode rejection of the part resulting in a code of 100 . 000, and a positive full-scale will remove common-mode noise on these inputs. The digital filter voltage resulting in a code of 111 . 111. The output code for will provide rejection of broadband noise on the power supply, any analog input voltage can be represented as follows: except at integer multiples of the modulator sampling frequency. The digital filter also removes noise from the analog and reference Code N = − 2 1 × AIN × GAIN ( / (1 024 . × V ) + [ ] REF 1 inputs provided these noise sources do not saturate the analog modulator. As a result, the AD7782 is more immune to noise inter- Where AIN is the analog input voltage, GAIN is the PGA gain, i.e., ference than a conventional high-resolution converter. However, 1 on the ±2.56 V range and 16 on the ±160 mV range and N = 24. because the resolution of the AD7782 is so high, and the noise
Crystal Oscillator
levels from the AD7782 so low, care must be taken with regard to The AD7782 is intended for use with a 32.768 kHz watch crystal. grounding and layout. A PLL internally locks onto a multiple of this frequency to provide The printed circuit board that houses the AD7782 should be a stable 4.194304 MHz clock for the ADC. The modulator sample designed such that the analog and digital sections are separated rate is the same as the crystal oscillator frequency. The start-up and confined to certain areas of the board. A minimum etch tech- time associated with 32.768 kHz crystals is typically 300 ms. In nique is generally best for ground planes as it gives the best shielding. some cases, it will be necessary to connect capacitors on the crystal It is recommended that the AD7782’s GND pin be tied to the to ensure that it does not oscillate at overtones of its fundamental AGND plane of the system. In any layout, it is important that the operating frequency. The values of capacitors will vary depending user keep in mind the flow of currents in the system, ensuring on the manufacturer’s specifications. that the return paths for all currents are as close as possible to the
Reference Input
paths the currents took to reach their destinations. Avoid forcing The AD7782 has a fully-differential reference input capability digital currents to flow through the AGND sections of the layout. for the channel. The common-mode range for these differential The AD7782’s ground plane should be allowed to run under the inputs is from GND to VDD. The reference input is unbuffered and AD7782 to prevent noise coupling. The power supply lines to the therefore excessive R-C source impedances will introduce gain AD7782 should use as wide a trace as possible to provide low imped- errors. The reference voltage REFIN (REFIN(+) – REFIN(–)) is ance paths and reduce the effects of glitches on the power supply 2.5 V nominal for specified operation but the AD7782 is functional line. Fast switching signals like clocks should be shielded with digital with reference voltages from 1 V to VDD. In applications where the ground to avoid radiating noise to other sections of the board, and excitation (voltage or current) for the transducer on the analog clock signals should never be run near the analog inputs. Avoid input also drives the reference voltage for the part, the effect of the crossover of digital and analog signals. Traces on opposite sides of low frequency noise in the excitation source will be removed as the the board should run at right angles to each other. This will reduce the application is ratiometric. If the AD7782 is used in a nonratiometric effects of feedthrough through the board. A microstrip technique application, a low noise reference should be used. Recommended is by far the best, but is not always possible with a double-sided reference voltage sources for the AD7782 include the AD780, board. In this technique, the component side of the board is dedi- REF43, and REF192. It should also be noted that the reference cated to ground planes while signals are placed on the solder side. inputs provide a high impedance, dynamic load. Because the input impedance of each reference input is dynamic, resistor/capacitor Good decoupling is important when using high-resolution ADCs. combinations on these inputs can cause dc gain errors, depending VDD should be decoupled with 10 µF tantalum in parallel with on the output impedance of the source that is driving the reference 0.1 µF capacitors to GND. To achieve the best from these decoupling inputs. Reference voltage sources like those recommended above components, they have to be placed as close as possible to the (e.g., AD780) will typically have low output impedances and are device, ideally right up against the device. All logic chips should therefore tolerant to having decoupling capacitors on the REFIN(+) be decoupled with 0.1 µF ceramic capacitors to DGND. REV. A –9–