Datasheet AD7676 (Analog Devices) - 3

制造商Analog Devices
描述500 kSPS CMOS 16-Bit PulSAR® ADC with INL of 1 LSB Max
页数 / 页21 / 3 — AD7676–SPECIFICATIONS (–40. C to +85. C, AVDD = DVDD = 5 V, OVDD = 2.7 V …
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AD7676–SPECIFICATIONS (–40. C to +85. C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.). Parameter

AD7676–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter

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AD7676–SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits ANALOG INPUT Voltage Range VIN+ – VIN– –VREF +VREF V Operating Input Voltage VIN+, VIN– to AGND –0.1 +3 V Analog Input CMRR fIN = 10 kHz 79 dB Input Current 500 kSPS Throughput 5 µA Input Impedance See Analog Inputs Section THROUGHPUT SPEED Complete Cycle 2 µs Throughput Rate 0 500 kSPS DC ACCURACY Integral Linearity Error –1 +1 LSB1 No Missing Codes 16 Bits Transition Noise 0.35 LSB +Full-Scale Error2 –22 +22 LSB –Full-Scale Error2 –22 +22 LSB Zero Error2 –8 +8 LSB Power Supply Sensitivity AVDD = 5 V ± 5% ±0.7 LSB AC ACCURACY Signal-to-Noise fIN = 20 kHz 92 94 dB3 fIN = 45 kHz 94 dB3 Spurious-Free Dynamic Range fIN = 20 kHz 104.5 110 dB3 fIN = 45 kHz 110 dB3 Total Harmonic Distortion fIN = 20 kHz –110 –103.5 dB3 fIN = 45 kHz –110 dB3 Signal-to-(Noise + Distortion) fIN = 20 kHz 92 94 dB3 fIN = 45 kHz 94 dB3 fIN = 45 kHz, –60 dB Input 34 dB3 –3 dB Input Bandwidth 3.9 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-Scale Step 750 ns REFERENCE External Reference Voltage Range 2.3 2.5 AVDD – 1.85 V External Reference Current Drain 500 kSPS Throughput 170 µA DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH +2.0 OVDD + 0.3 V IIL –1 +1 µA IIH –1 +1 µA DIGITAL OUTPUTS Data Format Parallel or Serial 16-Bit Conversion Results Available Pipeline Delay Immediately after Completed Conversion VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –100 µA OVDD – 0.6 V POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.254 V Operating Current 500 kSPS Throughput AVDD 9.5 mA DVDD5 3.9 mA OVDD5 37 µA Power Dissipation5 500 kSPS Throughput 67 74 mW 100 SPS Throughput 15 µW In Power-Down Mode6 7 µW TEMPERATURE RANGE7 Specified Performance TMIN to TMAX –40 +85 °C NOTES 1LSB means Least Significant Bit. Within the ± 2.5 V input range, one LSB is 76.3 µV. 2See Definition of Specifications section. These specifications do not include the error contribution from the external reference. 3All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale unless otherwise specified. 4The maximum should be the minimum of 5.25 V and DVDD + 0.3 V. 5Tested in Parallel Reading Mode. 6With OVDD below DVDD + 0.3 V and all digital inputs forced to DVDD or DGND, respectively. 7Contact factory for extended temperature range. Specifications subject to change without notice. –2– REV. B Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS RESOLUTION ANALOG INPUT THROUGHPUT SPEED DC ACCURACY AC ACCURACY SAMPLING DYNAMICS REFERENCE DIGITAL INPUTS DIGITAL OUTPUTS POWER SUPPLIES TEMPERATURE RANGE TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN FUNCTION DESCRIPTIONS (continued) PIN CONFIGURATION DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) +Full-Scale Error –Full-Scale Error Bipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Single-to-Differential Driver Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7676 Performance OUTLINE DIMENSIONS Revision History