Datasheet AD9218 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 10-Bit, 40/65/80/105 MSPS 3 V Dual A/D Converter |
| 页数 / 页 | 29 / 9 — AD9218. ABSOLUTE MAXIMUM RATINGS. EXPLANATION OF TEST LEVELS. Table 5. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 887 Kb |
| 文件语言 | 英语 |
AD9218. ABSOLUTE MAXIMUM RATINGS. EXPLANATION OF TEST LEVELS. Table 5. Parameter Rating. Table 6. User Select Modes
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AD9218 ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS Table 5. Parameter Rating
I. 100% production tested. VD, VDD 4 V II. 100% production tested at 25°C and sample tested at Analog Inputs –0.5 V to VD + 0.5 V specified temperatures. Digital Inputs –0.5 V to V + 0.5 DD V REFIN Inputs –0.5 V to VD + 0.5 V III. Sample tested only. Digital Output Current 20 mA Operating Temperature –55°C to +125°C IV. Parameter is guaranteed by design and characterization Storage Temperature –65°C to +150°C testing. Maximum Junction Temperature 150°C V. Parameter is a typical value only. Maximum Case Temperature 150°C θA (measured on a 4-layer board with 57°C/W VI. 100% production tested at 25°C; guaranteed by design solid ground plane) and characterization testing for industrial temperature range. Stresses above those listed under Absolute Maximum Ratings 100% production tested at temperature extremes for may cause permanent damage to the device. This is a stress military devices. rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
Table 6. User Select Modes
device reliability.
S1 S2 Power-Down and Data Alignment Settings
0 0 Power down both Channel A and Channel B. 0 1 Power down Channel B only. 1 0 Normal operation (data align disabled). 1 1 Data align enabled (data from both channels available on rising edge of Clock A. Channel B data is delayed by a ½ clock cycle.)
ESD CAUTION
Rev. C | Page 8 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE AD9218 ENCODE INPUT DIGITAL OUTPUTS ANALOG INPUT VOLTAGE REFERENCE TIMING USER SELECT OPTIONS APPLICATION INFORMATION AD9218/AD9288 CUSTOMER PCB BOM EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS VOLTAGE REFERENCE CLOCKING DATA OUTPUTS DATA FORMAT/GAIN TIMING TROUBLESHOOTING OUTLINE DIMENSIONS ORDERING GUIDE
I. 100% production tested. VD, VDD 4 V II. 100% production tested at 25°C and sample tested at Analog Inputs –0.5 V to VD + 0.5 V specified temperatures. Digital Inputs –0.5 V to V + 0.5 DD V REFIN Inputs –0.5 V to VD + 0.5 V III. Sample tested only. Digital Output Current 20 mA Operating Temperature –55°C to +125°C IV. Parameter is guaranteed by design and characterization Storage Temperature –65°C to +150°C testing. Maximum Junction Temperature 150°C V. Parameter is a typical value only. Maximum Case Temperature 150°C θA (measured on a 4-layer board with 57°C/W VI. 100% production tested at 25°C; guaranteed by design solid ground plane) and characterization testing for industrial temperature range. Stresses above those listed under Absolute Maximum Ratings 100% production tested at temperature extremes for may cause permanent damage to the device. This is a stress military devices. rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
Table 6. User Select Modes
device reliability.
S1 S2 Power-Down and Data Alignment Settings
0 0 Power down both Channel A and Channel B. 0 1 Power down Channel B only. 1 0 Normal operation (data align disabled). 1 1 Data align enabled (data from both channels available on rising edge of Clock A. Channel B data is delayed by a ½ clock cycle.)
ESD CAUTION
Rev. C | Page 8 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE AD9218 ENCODE INPUT DIGITAL OUTPUTS ANALOG INPUT VOLTAGE REFERENCE TIMING USER SELECT OPTIONS APPLICATION INFORMATION AD9218/AD9288 CUSTOMER PCB BOM EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS VOLTAGE REFERENCE CLOCKING DATA OUTPUTS DATA FORMAT/GAIN TIMING TROUBLESHOOTING OUTLINE DIMENSIONS ORDERING GUIDE