Datasheet AD7671 (Analog Devices) - 4

制造商Analog Devices
描述16-Bit, 1 MSPS CMOS ADC
页数 / 页25 / 4 — AD7671. Parameter. Conditions. Min. Typ. Max. Unit. Table I. Analog Input …
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AD7671. Parameter. Conditions. Min. Typ. Max. Unit. Table I. Analog Input Configuration. Input Voltage. Input. Range. IND(4R). INC(4R). INB(2R)

AD7671 Parameter Conditions Min Typ Max Unit Table I Analog Input Configuration Input Voltage Input Range IND(4R) INC(4R) INB(2R)

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AD7671 Parameter Conditions Min Typ Max Unit
POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.254 V Operating Current5 1 MSPS Throughput AVDD 15 mA DVDD6 7.2 mA OVDD6 37 mA Power Dissipation6, 7 666 kSPS Throughput8 84 95 mW 100 SPS Throughput8 15 mW 1 MSPS Throughput5 112 125 mW In Power-Down Mode9 7 mW TEMPERATURE RANGE10 Specified Performance TMIN to TMAX –40 +85 ∞C NOTES 1LSB means least significant bit. With the ±5 V input range, one LSB is 152.588 mV. 2See Definition of Specifications section. These specifications do not include the error contribution from the external reference. 3All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified. 4The max should be the minimum of 5.25 V and DVDD + 0.3 V. 5In Warp Mode. 6Tested in Parallel Reading Mode. 7Tested with the 0 V to 5 V range and VIN – VINGND = 0 V. See Power Dissipation section. 8In Impulse Mode. 9With OVDD below DVDD + 0.3 V and all digital inputs forced to DVDD or DGND, respectively. 10Contact factory for extended temperature range. Specifications subject to change without notice.
Table I. Analog Input Configuration Input Voltage Input Range IND(4R) INC(4R) INB(2R) INA(R) Impedance1
±4 REF2 VIN INGND INGND REF 1.63 kW ±2 REF VIN VIN INGND REF 948 W ±REF VIN VIN VIN REF 711 W 0 V to 4 REF VIN VIN INGND INGND 948 W 0 V to 2 REF VIN VIN VIN INGND 711 W 0 V to REF VIN VIN VIN VIN Note 3 NOTES 1Typical analog input impedance. 2With REF = 3 V, in this range, the input should be limited to –11 V to +12 V. 3For this range the input is high impedance.
TIMING SPECIFICATIONS (–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.) Parameter Symbol Min Typ Max Unit
Refer to Figures 11 and 12 Convert Pulsewidth t1 5 ns Time between Conversions t2 1/1.25/1.5 Note 1 ms (Warp Mode/Normal Mode/Impulse Mode) CNVST LOW to BUSY HIGH Delay t3 30 ns BUSY HIGH All Modes Except in Master Serial Read after t4 0.75/1/1.25 ms Convert Mode (Warp Mode/Normal Mode/Impulse Mode) Aperture Delay t5 2 ns End of Conversion to BUSY LOW Delay t6 10 ns Conversion Time (Warp Mode/Normal Mode/Impulse Mode) t7 0.75/1/1.25 ms Acquisition Time t8 250 ns RESET Pulsewidth t9 10 ns REV. C –3– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PulSAR Selection PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTION DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Bipolar Zero Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Driver Amplifier Choice Voltage Reference Input Scaler Reference Input (Bipolar Input Ranges) Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE SLAVE SERIAL INTERFACE External Clock MASTER SERIAL INTERFACE Internal Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7671 Performance OUTLINE DIMENSIONS Revision History