Datasheet AD9235 (Analog Devices)

12-Bit, 20/40/65 MSPS 3 V A/D Converter Data Sheet AD9235 FEATURES FUNCTIONAL BLOCK DIAGRAM Single 3 V supply operation (2.7 V to 3.6 V) AVDD DRVDD SNR = 70 dBc to Nyquist at 65 MSPS SFDR = 85 dBc to Nyquist at 65 MSPS VIN+ 8-STAGE SHA MDAC1 1 1/2-BIT A/D Low power: 300 mW at 65 MSPS VIN– PIPELINE Differential input with 500 MHz bandwidth 4 16 3 REFT A/D On-chip reference and SHA REFB DNL = ±0.4 LSB CORRECTION LOGIC Flexible analog input: 1 V p-p to 2 V p-p range 12 Offset binary or twos complement data format OUTPUT BUFFERS OTR Clock duty cycle stabilizer D11 AD9235 VREF D0 APPLICATIONS CLOCK DUTY CYCLE MODE Ultrasound equipment SENSE STABILIZER SELECT IF sampling in communications receivers REF 0.5V SELECT IS-95, CDMA-One, IMT-2000 Battery-powered instruments AGND CLK PDWN MODE DGND
02461-001
Hand-held scopemeters
Figure 1.
Low cost digital oscilloscopes GENERAL DESCRIPTION
The AD9235 is a family of monolithic, single 3 V supply, 12-bit, can be used with the most significant bit to determine low or 20/40/65 MSPS analog-to-digital converters (ADCs). This high overflow. family features a high performance sample-and-hold amplifier Fabricated on an advanced CMOS process, the AD9235 is avail- (SHA) and voltage reference. The AD9235 uses a multistage able in a 28-lead TSSOP and a 32-lead LFCSP and is specified differential pipelined architecture with output error correction over the industrial temperature range (–40°C to +85°C). logic to provide 12-bit accuracy at 20/40/65 MSPS data rates and guarantee no missing codes over the ful operating
PRODUCT HIGHLIGHTS
temperature range. 1. The AD9235 operates from a single 3 V power supply and The wide bandwidth, truly differential SHA al ows a variety of features a separate digital output driver supply to accommo- user-selectable input ranges and offsets including single-ended date 2.5 V and 3.3 V logic families. applications. It is suitable for multiplexed systems that switch 2. Operating at 65 MSPS, the AD9235 consumes a low 300 mW. ful -scale voltage levels in successive channels and for sampling 3. The patented SHA input maintains excellent performance for single-channel inputs at frequencies well beyond the Nyquist rate. input frequencies up to 100 MHz and can be configured for Combined with power and cost savings over previously available single-ended or differential operation. ADCs, the AD9235 is suitable for applications in communica- 4. The AD9235 pinout is similar to the AD9214-65, a 10-bit, tions, imaging, and medical ultrasound. 65 MSPS ADC. This allows a simplified upgrade path from 10 bits to 12 bits for 65 MSPS systems. A single-ended clock input is used to control all internal 5. The clock DCS maintains overall ADC performance over a conversion cycles. A duty cycle stabilizer (DCS) compensates wide range of clock pulse widths. for wide variations in the clock duty cycle while maintaining 6. The OTR output bit indicates when the signal is beyond the excellent overal ADC performance. The digital output data is selected input range. presented in straight binary or twos complement formats. An out-of-range (OTR) signal indicates an overflow condition that
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Document Outline Specifications DC Specifications Digital Specifications Switching Specifications AC Specifications Absolute Maximum Ratings Explanation of Test Levels ESD Caution Pin Configurations and Function Descriptions Definitions of Specifications Equivalent Circuits Typical Performance Characteristics Applying the AD9235 Theory of Operation Analog Input Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Power Dissipation and Standby Mode Digital Outputs Timing Voltage Reference Internal Reference Connection External Reference Operation Operational Mode Selection TSSOP Evaluation Board LFCSP Evaluation Board Outline Dimensions Ordering Guide