Datasheet AD7665 (Analog Devices) - 6

制造商Analog Devices
描述16-Bit 570 kSPS Bipolar PulSAR® ADC
页数 / 页24 / 6 — AD7665. ABSOLUTE MAXIMUM RATINGS1. PIN CONFIGURATION. ST-48 and CP-48. …
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AD7665. ABSOLUTE MAXIMUM RATINGS1. PIN CONFIGURATION. ST-48 and CP-48. IND(4R). INC(4R). INB(2R). INA(R). INGND. REFGND. REF

AD7665 ABSOLUTE MAXIMUM RATINGS1 PIN CONFIGURATION ST-48 and CP-48 IND(4R) INC(4R) INB(2R) INA(R) INGND REFGND REF

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AD7665 ABSOLUTE MAXIMUM RATINGS1 PIN CONFIGURATION
Analog Inputs
ST-48 and CP-48
IND2, INC2, INB2 . –11 V to +30 V INA, REF, INGND, REFGND . AGND – 0.3 V to AVDD + 0.3 V Ground Voltage Differences
NC NC NC NC NC IND(4R) INC(4R) INB(2R) INA(R) INGND REFGND REF 48 47 46 45 44 43 42 41 40 39 38 37
AGND, DGND, OGND . ±0.3 V Supply Voltages
AGND 1 36 PIN 1 AGND AVDD 2 IDENTIFIER 35 CNVST
AVDD, DVDD, OVDD . –0.3 V to + 7 V
NC 3 34 PD
AVDD to DVDD, AVDD to OVDD . ±7 V
BYTESWAP 4 33 RESET
DVDD to OVDD . –0.3 V to + 7 V
OB/2C 5 32 CS
Digital Inputs . –0.3 V to DVDD + 0.3 V
WARP 6 AD7665 31 RD IMPULSE 7 TOP VIEW
Internal Power Dissipation3 . 700 mW
30 (Not to Scale) DGND SER/PAR 8 29 BUSY
Internal Power Dissipation4 . 2.5 W
D0 9 28 D15
Junction Temperature . 150°C
D1 10 27 D14
Storage Temperature Range . –65°C to +150°C
D2/DIVSCLK[0] 11 26 D13
Lead Temperature Range
D3/DIVSCLK[1] 12 25 D12
(Soldering 10 sec) . 300°C
13 14 15 16 17 18 19 20 21 22 23 24 NC = NO CONNECT
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
INT
nent damage to the device. This is a stress rating only; functional operation of the
OGND OVDD DVDD DGND
device at these or any other conditions above those indicated in the operational
D9/SCLK D10/SYNC
section of this specification is not implied. Exposure to absolute maximum rating
D4/EXT/ D8/SDOUT D5/INVSYNC D6/INVSCLK D7/RDC/SDIN
conditions for extended periods may affect device reliability.
D11/RDERROR
2See Analog Inputs section.
The exposed paddle should be connected to GND.
3Specification is for device in free air: 48-Lead LQFP: qJA = 91°C/W, qJC = 30°C/W. 4Specification is for device in free air: 48-Lead LFCSP: qJC = 26°C/W.
1.6mA IOL TO OUTPUT 1.4V PIN CL 60pF* 500 I A OH 2V 0.8V *IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND t t DELAY DELAY SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD 2V 2V CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM. 0.8V 0.8V
Figure 1. Load Circuit for Digital Interface Timing, SDOUT, Figure 2. Voltage Reference Levels for Timing SYNC, SCLK Outputs, CL = 10 pF
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7665 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. C –5–