Datasheet AD7898 (Analog Devices) - 9

AD7898 –40 CONVERTER DETAILS
The AD7898 is a fast, 12-bit single supply A/D converter. It
–45
provides the user with signal scaling, track/hold, A/D converter, and serial interface logic functions on a single chip. The A/D
–50
converter section of the AD7898 consists of a conventional successive-approximation converter based around an R-2R
–55
ladder structure. The signal scaling on the AD7898-10 and AD7898-3 allows the part to handle ± 10 V and ± 2.5 V input
–60 SINAD – dB
signals, respectively, while operating from a single 5 V supply.
VDD = VDRIVE = 5.25V
The part requires an external 2.5 V reference. The reference
–65 VDD = VDRIVE = 4.75V
input to the part is buffered on-chip. The AD7898 has two operating modes, an internal clocking mode using an on-chip
–70
oscillator and an external clocking mode using the SCLK as
VDD = 5.0V, VDRIVE = 3.0V –75
the master clock. The latter mode features a power-down
10 100 1000
mechanism. These modes are discussed in more detail in the
INPUT FREQUENCY – kHz
Operating Modes section. TPC 5. SINAD vs. Input Frequency at 220 kSPS A major advantage of the AD7898 is that it provides all of the TPC 5 shows a graph of Signal to (Noise + Distortion) above functions in an 8-lead SOIC package. This offers the user ratio versus Input Frequency for various supply voltages considerable spacing saving advantages over alternative solutions. while sampling at 220 kSPS. The on-chip track-and-hold The AD7898 consumes only 22.5 mW maximum, making it can accommodate frequencies up to 4.7 MHz for AD7898-3, ideal for battery-powered applications. and up to 3.6 MHz for AD7898-10, making the AD7898 ideal In Mode 0 operation, conversion is initiated on the AD7898 by for subsampling applications. pulsing the CONVST input. On the falling edge of CONVST,
Noise
the on-chip track/hold goes from track to hold mode, and the In an A/D converter, noise exhibits itself as a code uncertainty conversion sequence is started. The conversion clock for the in dc applications, and as the noise floor (in an FFT, for part is generated internally using a laser-trimmed clock oscilla- example) in ac applications. In a sampling A/D converter like tor circuit. Conversion time for the AD7898 is 3.3 µs, and the the AD7898, all information about the analog input appears in quiet time is 0.1 µs. To obtain optimum performance from the the baseband, from dc to half the sampling frequency. The input part in Mode 0, the read operation should not occur during the bandwidth of the track/hold exceeds the Nyquist bandwidth conversion. and, therefore, an antialiasing filter should be used to remove In Mode 1 operation, conversion is initiated on the AD7898 by unwanted signals above fS/2 in the input signal in applications the falling edge of CS. Sixteen SCLK cycles are required to where such signals exist. complete the conversion and access the conversion result, after TPC 6 shows a histogram plot for 8192 conversions of a dc which time CS may be brought high. The internal oscillator is input using the AD7898. The analog input was set at the center not used as the conversion clock in this mode as the SCLK is of a code transition. It can be seen that almost all the codes used instead. The maximum SCLK frequency is 3.7 MHz in appear in one output bin, indicating very good noise perfor- Mode 1 providing a minimum conversion time of 4.33 µs. As in mance from the ADC. Mode 0, another conversion should not be initiated during the quiet time after the end of conversion.
6500
Both of these modes of operation allow the part to operate
6000
at throughput rates up to 220 kHz and achieve data sheet
5500
specifications.
5000 4500 CIRCUIT DESCRIPTION 4000 Analog Input Section 3500
The AD7898 is offered as two part types: the AD7898-10,
3000
which handles a ± 10 V input voltage range; the AD7898-3,
2500
which handles input voltage range ± 2.5 V.
2000 1500 VREF AD7898-10/AD7898-3 1000 500 TO ADC REFERENCE 0 CIRCUITRY 2044 2045 2046 2047 2048 2049 2050 R2
TPC 6. Histogram of 8192 Conversions of a DC Input
R1 V TO INTERNAL IN COMPARATOR R3 TRACK/HOLD AGND
Figure 2. Analog Input Structure –8– REV. A Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Signal to (Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion Relative Accuracy Differential Nonlinearity Positive Full-Scale Error (AD7898-10) Positive Full-Scale Error (AD7898-3) Bipolar Zero Error (AD7898-10, AD7898-3) Negative Full-Scale Error (AD7898-10) Negative Full-Scale Error (AD7898-3) Track/Hold Acquisition Time PSR (Power Supply Rejection) PERFORMANCE CURVES Noise CONVERTER DETAILS CIRCUIT DESCRIPTION Analog Input Section Acquisition Time TYPICAL CONNECTION DIAGRAM VDRIVE Feature Track/Hold Section Reference Input SERIAL INTERFACE OPERATING MODES Mode 0 Operation Mode 1 Operation Mode Selection Power-Down Mode Power-Up Times MICROPROCESSOR/MICROCONTROLLER INTERFACE FOR MODE 0 OPERATION 8x51/L51 to AD7898 Interface 68HC11/L11 to AD7898 Interface ADSP-2103/ADSP-2105 to AD7898 Interface DSP56002/L002 to AD7898 Interface MICROPROCESSOR INTERFACING FOR MODE 1 TMS320C5x/C54x to AD7898 Interface AD7898 to ADSP-21xx Interface AD7898 to DSP56xxx Interface AD7898 to MC68HC16 Interface OUTLINE DIMENSIONS Revision History