Datasheet AD9226 (Analog Devices) - 8

制造商Analog Devices
描述12-Bit, 65 MSPS Analog-to-Digital Converter
页数 / 页29 / 8 — AD9226. DEFINITIONS OF SPECIFICATIONS. EFFECTIVE NUMBER OF BITS (ENOB). …
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AD9226. DEFINITIONS OF SPECIFICATIONS. EFFECTIVE NUMBER OF BITS (ENOB). INTEGRAL NONLINEARITY (INL)

AD9226 DEFINITIONS OF SPECIFICATIONS EFFECTIVE NUMBER OF BITS (ENOB) INTEGRAL NONLINEARITY (INL)

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AD9226 DEFINITIONS OF SPECIFICATIONS EFFECTIVE NUMBER OF BITS (ENOB) INTEGRAL NONLINEARITY (INL)
For a sine wave, SINAD can be expressed in terms of the num- INL refers to the deviation of each individual code from a line ber of bits. Using the following formula, drawn from “negative full scale” through “positive full scale.” N = (SINAD – 1.76)/6.02 The point used as “negative full scale” occurs 1/2 LSB before the first code transition. “Positive full scale” is defined as a level it is possible to obtain a measure of performance expressed as 1 1/2 LSB beyond the last code transition. The deviation is N, the effective number of bits. measured from the middle of each particular code to the true Thus, effective number of bits for a device for sine wave inputs straight line. at a given input frequency can be calculated directly from its measured SINAD.
DIFFERENTIAL NONLINEARITY (DNL, NO MISSING CODES) TOTAL HARMONIC DISTORTION (THD)
An ideal ADC exhibits code transitions that are exactly 1 LSB THD is the ratio of the rms sum of the first six harmonic com- apart. DNL is the deviation from this ideal value. Guaranteed ponents to the rms value of the measured input signal and is no missing codes to 12-bit resolution indicates that all 4096 expressed as a percentage or in decibels. codes, respectively, must be present over all operating ranges.
SIGNAL-TO-NOISE RATIO (SNR) ZERO ERROR
SNR is the ratio of the rms value of the measured input signal to The major carry transition should occur for an analog value the rms sum of all other spectral components below the Nyquist 1/2 LSB below VINA = VINB. Zero error is defined as the frequency, excluding the first six harmonics and dc. The value deviation of the actual transition from that point. for SNR is expressed in decibels.
GAIN ERROR SPURIOUS FREE DYNAMIC RANGE (SFDR)
The first code transition should occur at an analog value SFDR is the difference in dB between the rms amplitude of the 1/2 LSB above negative full scale. The last transition should input signal and the peak spurious signal. occur at an analog value 1 1/2 LSB below the positive full scale. Gain error is the deviation of the actual difference between first
ENCODE PULSEWIDTH DUTY CYCLE
and last code transitions and the ideal difference between first Pulsewidth high is the minimum amount of time that the clock and last code transitions. pulse should be left in the logic “1” state to achieve rated per- formance; pulsewidth low is the minimum time the clock pulse
TEMPERATURE DRIFT
should be left in the low state. At a given clock rate, these specs The temperature drift for zero error and gain error specifies the define an acceptable clock duty cycle. maximum change from the initial (25°C) value to the value at TMIN or TMAX.
MINIMUM CONVERSION RATE
The clock rate at which the SNR of the lowest analog signal
POWER SUPPLY REJECTION
frequency drops by no more than 3 dB below the guaranteed limit. The specification shows the maximum change in full scale from the value with the supply at the minimum limit to the value with
MAXIMUM CONVERSION RATE
the supply at its maximum limit. The encode rate at which parametric testing is performed.
APERTURE JITTER OUTPUT PROPAGATION DELAY
Aperture jitter is the variation in aperture delay for successive The delay between the clock logic threshold and the time when samples and can be manifested as noise on the input to the ADC. all bits are within valid logic levels.
APERTURE DELAY TWO TONE SFDR
Aperture delay is a measure of the sample-and-hold amplifier The ratio of the rms value of either input tone to the rms value (SHA) performance and is measured from the rising edge of the of the peak spurious component. The peak spurious component clock input to when the input signal is held for conversion. may or may not be an IMD product. May be reported in dBc (i.e., degrades as signal levels are lowered) or in dBFS (always
SIGNAL-TO-NOISE AND DISTORTION (S/N+D, SINAD)
related back to converter full scale).
RATIO
S/N+D is the ratio of the rms value of the measured input signal to the rms sum of all other spectral components below the Nyquist frequency, including harmonics but excluding dc. The value for S/N+D is expressed in decibels. REV. B –7–