Datasheet AD7476, AD7477, AD7478 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 8-Bit, 1 MSPS, Low Power Successive Approximation ADC Which Operates From A Single 2.35 V to 5.25 V Power Supply |
| 页数 / 页 | 24 / 3 — AD7476/AD7477/AD7478. SPECIFICATIONS AD7476 SPECIFICATIONS. Table 1. … |
| 修订版 | F |
| 文件格式/大小 | PDF / 341 Kb |
| 文件语言 | 英语 |
AD7476/AD7477/AD7478. SPECIFICATIONS AD7476 SPECIFICATIONS. Table 1. Parameter. A Version1,2. B Version1,2 S. Version1,2. Unit
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AD7476/AD7477/AD7478 SPECIFICATIONS AD7476 SPECIFICATIONS
A version: VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, fSAMPLE = 1 MSPS, unless otherwise noted; S and B versions: VDD = 2.35 V to 5.25 V, fSCLK = 12 MHz, fSAMPLE = 600 kSPS, unless otherwise noted; TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter A Version1,2 B Version1,2 S Version1,2 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-(Noise + Distortion) (SINAD)3 69 70 69 dB min B version, VDD = 2.4 V to 5.25 V 70 70 dB min TA = 25°C 71.5 dB typ Signal-to-Noise Ratio (SNR)3 70 71 70 dB min B version, VDD = 2.4 V to 5.25 V 72.5 dB typ Total Harmonic Distortion (THD)3 −80 −78 −78 dB typ Peak Harmonic or Spurious Noise (SFDR)3 −82 −80 −80 dB typ Intermodulation Distortion (IMD)3 Second-Order Terms −78 −78 −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Third-Order Terms −78 −78 −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Aperture Delay 10 10 10 ns typ Aperture Jitter 30 30 30 ps typ Full Power Bandwidth 6.5 6.5 6.5 MHz typ @ 3 dB DC ACCURACY S, B versions, VDD = (2.35 V to 3.6 V)4; A version, VDD = (2.7 V to 3.6 V) Resolution 12 12 12 Bits Integral Nonlinearity3 ±1.5 ±1.5 LSB max ±1 ±0.6 ±0.6 LSB typ Differential Nonlinearity3 −0.9/+1.5 −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits ±0.75 ±0.75 ±0.75 LSB typ Offset Error3 ±1.5 ±2 LSB max ±0.5 LSB typ Gain Error3 ±1.5 ±2 LSB max ±0.5 LSB typ ANALOG INPUT Input Voltage Ranges 0 to VDD 0 to VDD 0 to VDD V DC Leakage Current ±1 ±1 ±1 μA max Input Capacitance 30 30 30 pF typ LOGIC INPUT Input High Voltage, VINH 2.4 2.4 2.4 V min 1.8 1.8 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.4 0.4 0.4 V max VDD = 3 V 0.8 0.8 0.8 V max VDD = 5 V Input Current, IIN, SCLK Pin ±1 ±1 ±1 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±1 ±1 ±1 μA typ Input Capacitance, C 5 IN 10 10 10 pF max LOGIC OUTPUT Output High Voltage, VOH VDD − 0.2 VDD − 0.2 VDD − 0.2 V min ISOURCE = 200 μA; VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.4 0.4 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±10 ±10 ±10 μA max Floating-State Output Capacitance5 10 10 10 pF max Output Coding Straight (Natural) Binary Rev. F | Page 3 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476 SPECIFICATIONS AD7477 SPECIFICATIONS AD7478 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Input MODES OF OPERATION Normal Mode Power-Down Mode Power-Up Time POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476/AD7477/AD7478 to TMS320C5x/C54x Interface AD7476/AD7477/AD7478 to ADSP-21xx Interface AD7476/AD7477/AD7478 to DSP56xxx Interface AD7476/AD7477/AD7478 to MC68HC16 Interface OUTLINE DIMENSIONS ORDERING GUIDE
AD7476/AD7477/AD7478 SPECIFICATIONS AD7476 SPECIFICATIONS
A version: VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, fSAMPLE = 1 MSPS, unless otherwise noted; S and B versions: VDD = 2.35 V to 5.25 V, fSCLK = 12 MHz, fSAMPLE = 600 kSPS, unless otherwise noted; TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter A Version1,2 B Version1,2 S Version1,2 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-(Noise + Distortion) (SINAD)3 69 70 69 dB min B version, VDD = 2.4 V to 5.25 V 70 70 dB min TA = 25°C 71.5 dB typ Signal-to-Noise Ratio (SNR)3 70 71 70 dB min B version, VDD = 2.4 V to 5.25 V 72.5 dB typ Total Harmonic Distortion (THD)3 −80 −78 −78 dB typ Peak Harmonic or Spurious Noise (SFDR)3 −82 −80 −80 dB typ Intermodulation Distortion (IMD)3 Second-Order Terms −78 −78 −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Third-Order Terms −78 −78 −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Aperture Delay 10 10 10 ns typ Aperture Jitter 30 30 30 ps typ Full Power Bandwidth 6.5 6.5 6.5 MHz typ @ 3 dB DC ACCURACY S, B versions, VDD = (2.35 V to 3.6 V)4; A version, VDD = (2.7 V to 3.6 V) Resolution 12 12 12 Bits Integral Nonlinearity3 ±1.5 ±1.5 LSB max ±1 ±0.6 ±0.6 LSB typ Differential Nonlinearity3 −0.9/+1.5 −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits ±0.75 ±0.75 ±0.75 LSB typ Offset Error3 ±1.5 ±2 LSB max ±0.5 LSB typ Gain Error3 ±1.5 ±2 LSB max ±0.5 LSB typ ANALOG INPUT Input Voltage Ranges 0 to VDD 0 to VDD 0 to VDD V DC Leakage Current ±1 ±1 ±1 μA max Input Capacitance 30 30 30 pF typ LOGIC INPUT Input High Voltage, VINH 2.4 2.4 2.4 V min 1.8 1.8 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.4 0.4 0.4 V max VDD = 3 V 0.8 0.8 0.8 V max VDD = 5 V Input Current, IIN, SCLK Pin ±1 ±1 ±1 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±1 ±1 ±1 μA typ Input Capacitance, C 5 IN 10 10 10 pF max LOGIC OUTPUT Output High Voltage, VOH VDD − 0.2 VDD − 0.2 VDD − 0.2 V min ISOURCE = 200 μA; VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.4 0.4 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±10 ±10 ±10 μA max Floating-State Output Capacitance5 10 10 10 pF max Output Coding Straight (Natural) Binary Rev. F | Page 3 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476 SPECIFICATIONS AD7477 SPECIFICATIONS AD7478 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Analog Input Digital Input MODES OF OPERATION Normal Mode Power-Down Mode Power-Up Time POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476/AD7477/AD7478 to TMS320C5x/C54x Interface AD7476/AD7477/AD7478 to ADSP-21xx Interface AD7476/AD7477/AD7478 to DSP56xxx Interface AD7476/AD7477/AD7478 to MC68HC16 Interface OUTLINE DIMENSIONS ORDERING GUIDE