Datasheet AD9432 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | 12-Bit, 105 MSPS Analog-to-Digital Converter |
| 页数 / 页 | 17 / 1 — 12-Bit, 80 MSPS/105 MSPS ADC. AD9432. FEATURES. GENERAL INTRODUCTION. … |
| 修订版 | F |
| 文件格式/大小 | PDF / 446 Kb |
| 文件语言 | 英语 |
12-Bit, 80 MSPS/105 MSPS ADC. AD9432. FEATURES. GENERAL INTRODUCTION. On-chip reference and track-and-hold. On-chip input buffer
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12-Bit, 80 MSPS/105 MSPS ADC AD9432 FEATURES GENERAL INTRODUCTION On-chip reference and track-and-hold
The AD9432 is a 12-bit, monolithic sampling analog-to-digital
On-chip input buffer
converter (ADC) with an on-chip track-and-hold circuit and is
Power dissipation: 850 mW typical at 105 MSPS
optimized for high speed conversion and ease of use. The prod-
500 MHz analog bandwidth
uct operates up to a 105 MSPS conversion rate with outstanding
SNR: 67 dB @ 49 MHz AIN at 105 MSPS
dynamic performance over its full operating range.
SFDR: 80 dB @ 49 MHz AIN at 105 MSPS
The ADC requires only a single 5.0 V power supply and a 105 MHz
2.0 V p-p analog input range
encode clock for full performance operation. No external refer-
5.0 V supply operation
ence or driver components are required for many applications.
3.3 V CMOS/TTL outputs
The digital outputs are TTL-/CMOS-compatible, and a separate
Twos complement output format
output power supply pin supports interfacing with 3.3 V logic.
APPLICATIONS
The encode input supports either differential or single-ended
Communications
mode and is TTL-/CMOS-compatible.
Base stations and zero-IF subsystems
Fabricated on an advanced BiCMOS process, the AD9432 is
Wireless local loop (WLL)
available in a 52-lead low profile quad flat package (LQFP) and
Local multipoint distribution service (LMDS)
in a 52-lead thin quad flat package (TQFP_EP). The AD9432 is
HDTV broadcast cameras and film scanners
specified over the industrial temperature range of −40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM VCC VDD 12 AIN 12 D11 TO D0 BUF T/H PIPELINE ADC OUTPUT AIN STAGING OR ENCODE TIMING REF ENCODE AD9432
1 -00 87
GND VREFOUT VREFIN
005 Figure 1.
Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL INTRODUCTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT ENCODE INPUT ENCODE VOLTAGE LEVEL DEFINITION DIGITAL OUTPUTS VOLTAGE REFERENCE TIMING APPLICATIONS INFORMATION USING THE AD8138 TO DRIVE THE AD9432 OUTLINE DIMENSIONS ORDERING GUIDE
The AD9432 is a 12-bit, monolithic sampling analog-to-digital
On-chip input buffer
converter (ADC) with an on-chip track-and-hold circuit and is
Power dissipation: 850 mW typical at 105 MSPS
optimized for high speed conversion and ease of use. The prod-
500 MHz analog bandwidth
uct operates up to a 105 MSPS conversion rate with outstanding
SNR: 67 dB @ 49 MHz AIN at 105 MSPS
dynamic performance over its full operating range.
SFDR: 80 dB @ 49 MHz AIN at 105 MSPS
The ADC requires only a single 5.0 V power supply and a 105 MHz
2.0 V p-p analog input range
encode clock for full performance operation. No external refer-
5.0 V supply operation
ence or driver components are required for many applications.
3.3 V CMOS/TTL outputs
The digital outputs are TTL-/CMOS-compatible, and a separate
Twos complement output format
output power supply pin supports interfacing with 3.3 V logic.
APPLICATIONS
The encode input supports either differential or single-ended
Communications
mode and is TTL-/CMOS-compatible.
Base stations and zero-IF subsystems
Fabricated on an advanced BiCMOS process, the AD9432 is
Wireless local loop (WLL)
available in a 52-lead low profile quad flat package (LQFP) and
Local multipoint distribution service (LMDS)
in a 52-lead thin quad flat package (TQFP_EP). The AD9432 is
HDTV broadcast cameras and film scanners
specified over the industrial temperature range of −40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM VCC VDD 12 AIN 12 D11 TO D0 BUF T/H PIPELINE ADC OUTPUT AIN STAGING OR ENCODE TIMING REF ENCODE AD9432
1 -00 87
GND VREFOUT VREFIN
005 Figure 1.
Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL INTRODUCTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT ENCODE INPUT ENCODE VOLTAGE LEVEL DEFINITION DIGITAL OUTPUTS VOLTAGE REFERENCE TIMING APPLICATIONS INFORMATION USING THE AD8138 TO DRIVE THE AD9432 OUTLINE DIMENSIONS ORDERING GUIDE