Datasheet AD9283 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 8-Bit, 50 MSPS/80 MSPS/100 MSPS ADC |
| 页数 / 页 | 13 / 5 — AD9283. EXPLANATION OF TEST LEVELS. Table I. Output Coding (VREF = 1.25 … |
| 修订版 | C |
| 文件格式/大小 | PDF / 281 Kb |
| 文件语言 | 英语 |
AD9283. EXPLANATION OF TEST LEVELS. Table I. Output Coding (VREF = 1.25 V). Test Level. Step. AIN–AIN. Digital Output
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AD9283 EXPLANATION OF TEST LEVELS Table I. Output Coding (VREF = 1.25 V) Test Level
I 100% production tested.
Step AIN–AIN Digital Output
II 100% production tested at 25°C and sample tested at 255 0.512 1111 1111 specified temperatures. • • • III Sample tested only. • • • IV Parameter is guaranteed by design and characteriza- 128 0.002 1000 0000 tion testing. 127 –0.002 0111 1111 • • • V Parameter is a typical value only. • • • VI 100% production tested at 25°C; guaranteed by design and 0 –0.512 0000 0000 characterization testing for industrial temperature range; 100% production tested at temperature extremes for mili- tary devices.
PIN CONFIGURATION PWRDWN 1 20 D0 (LSB) VREF OUT 2 19 D1 VREF IN 3 18 D2 GND 4 17 D3 5 16 VD AD9283 GND TOP VIEW A 6 15 V IN (Not to Scale) DD A 7 14 IN D4 V 8 13 D D5 GND 9 12 D6 ENCODE 10 11 D7 (MSB) PIN FUNCTION DESCRIPTIONS Pin Number Mnemonic Function
1 PWRDWN Power-Down Function Select; Logic HIGH for Power-Down Mode (Digital Outputs Go to High Impedance State) 2 VREF OUT Internal Reference Output (1.25 V typ); Bypass with 0.1 µF to Ground 3 VREF IN Reference Input for ADC (1.25 V typ) 4, 9, 16 GND Ground 5, 8 VD Analog 3 V Power Supply 6 AIN Analog Input for ADC (Can Be Left Open if Operating in Single-Ended Mode, but Rec- ommend Connection to a 0.1 µF Capacitor and a 25 Ω Resistor in Series to Ground for Better Input Matching) 7 AIN Analog Input for ADC 10 ENCODE Encode Clock for ADC (ADC Samples on Rising Edge of ENCODE) 11–14, 17–20 D7–D4, D3–D0 Digital Outputs of ADC 15 VDD Digital output power supply. Nominally 2.5 V to 3.6 V –4– REV. C
I 100% production tested.
Step AIN–AIN Digital Output
II 100% production tested at 25°C and sample tested at 255 0.512 1111 1111 specified temperatures. • • • III Sample tested only. • • • IV Parameter is guaranteed by design and characteriza- 128 0.002 1000 0000 tion testing. 127 –0.002 0111 1111 • • • V Parameter is a typical value only. • • • VI 100% production tested at 25°C; guaranteed by design and 0 –0.512 0000 0000 characterization testing for industrial temperature range; 100% production tested at temperature extremes for mili- tary devices.
PIN CONFIGURATION PWRDWN 1 20 D0 (LSB) VREF OUT 2 19 D1 VREF IN 3 18 D2 GND 4 17 D3 5 16 VD AD9283 GND TOP VIEW A 6 15 V IN (Not to Scale) DD A 7 14 IN D4 V 8 13 D D5 GND 9 12 D6 ENCODE 10 11 D7 (MSB) PIN FUNCTION DESCRIPTIONS Pin Number Mnemonic Function
1 PWRDWN Power-Down Function Select; Logic HIGH for Power-Down Mode (Digital Outputs Go to High Impedance State) 2 VREF OUT Internal Reference Output (1.25 V typ); Bypass with 0.1 µF to Ground 3 VREF IN Reference Input for ADC (1.25 V typ) 4, 9, 16 GND Ground 5, 8 VD Analog 3 V Power Supply 6 AIN Analog Input for ADC (Can Be Left Open if Operating in Single-Ended Mode, but Rec- ommend Connection to a 0.1 µF Capacitor and a 25 Ω Resistor in Series to Ground for Better Input Matching) 7 AIN Analog Input for ADC 10 ENCODE Encode Clock for ADC (ADC Samples on Rising Edge of ENCODE) 11–14, 17–20 D7–D4, D3–D0 Digital Outputs of ADC 15 VDD Digital output power supply. Nominally 2.5 V to 3.6 V –4– REV. C