Datasheet AD9224 (Analog Devices) - 9

AD9224
Due to the high degree of symmetry within the SHA topology,
a significant improvement in distortion performance for differential input signals with frequencies up to and beyond Nyquist
can be realized. This inherent symmetry provides excellent
cancellation of both common-mode distortion and noise.
Also, the required input signal voltage span is reduced by a
half which further reduces the degree of RON modulation and
its effects on distortion. VCC AD9224 RS VINA
RS
VINB
VEE
VREF
10mF 0.1mF
SENSE
REFCOM The optimum noise and dc linearity performance for either
differential or single-ended inputs is achieved with the largest
input signal voltage span (i.e., 4 V input span) and matched
input impedance for VINA and VINB. Only a slight degradation in dc linearity performance exists between the 2 V and
4 V input spans. Figure 15. Series Resistor Isolates Switched-Capacitor
SHA Input from Op Amp. Matching Resistors Improve
SNR Performance The optimum size of this resistor is dependent on several factors, including the ADC sampling rate, the selected op amp,
and the particular application. In most applications, a 30 Ω to
100 Ω resistor is sufficient. However, some applications may
require a larger resistor value to reduce the noise bandwidth or
possibly limit the fault current in an overvoltage condition.
Other applications may require a larger resistor value as part of
an antialiasing filter. In any case, since the THD performance is
dependent on the series resistance and the above mentioned
factors, optimizing this resistor value for a given application is
encouraged. Referring to Figure 14, the differential SHA is implemented
using a switched-capacitor topology. Its input impedance and
its switching effects on the input drive source should be considered in order to maximize the converter’s performance. The
combination of the pin capacitance, CPIN, parasitic capacitance
CPAR, and the sampling capacitance, CS, is typically less than
5 pF. When the SHA goes into track mode, the input source
must charge or discharge the voltage stored on CS to the new
input voltage. This action of charging and discharging CS,
averaged over a period of time and for a given sampling frequency, FS, makes the input impedance appear to have a benign resistive component. However, if this action is analyzed
within a sampling period (i.e., T = 1/FS), the input impedance
is dynamic and hence certain precautions on the input drive
source should be observed. The source impedance driving VINA and VINB should be
matched. Failure to provide that matching will result in the
degradation of the AD9224’s SNR, THD and SFDR.
For noise sensitive applications, the very high bandwidth of the
AD9224 may be detrimental and the addition of a series resistor
and/or shunt capacitor can help limit the wideband noise at the
A/D’s input by forming a low-pass filter. Note, however, that
the combination of this series resistance with the equivalent
input capacitance of the AD9224 should be evaluated for those
time domain applications that are sensitive to the input signal’s
absolute settling time. In applications where harmonic distortion is not a primary concern, the series resistance may be
selected in combination with the nominal 10 pF of input
capacitance to set the filter’s 3 dB cutoff frequency. The resistive component to the input impedance can be computed by calculating the average charge drawn by CH from the
input drive source. It can be shown that if CS is allowed to
fully charge up to the input voltage before switches QS1 are
opened, the average current into the input is the same as if
there were a resistor of 1/(CS FS) ohms connected between the
inputs. This means that the input impedance is inversely proportional to the converter’s sample rate. Since CS is only 5 pF,
this resistive component is typically much larger than that of
the drive source (i.e., 5 kΩ at FS = 40 MSPS). A better method of reducing the noise bandwidth, while possibly establishing a real pole for an antialiasing filter, is to add
some additional shunt capacitance between the input (i.e.,
VINA and/or VINB) and analog ground. Since this additional
shunt capacitance combines with the equivalent input capacitance of the AD9224, a lower series resistance can be selected to
establish the filter’s cutoff frequency while not degrading the
distortion performance of the device. The shunt capacitance
also acts like a charge reservoir, sinking or sourcing the additional charge required by the hold capacitor, CH, further reducing current transients seen at the op amp’s output. The SHA’s input impedance over a sampling period appears as
a dynamic input impedance to the input drive source. When the
SHA goes into the track mode, the input source should ideally
provide the charging current through RON of switch QS1 in an
exponential manner. The requirement of exponential charging
means that the most common input source, an op amp, must
exhibit a source impedance that is both low and resistive up to
and beyond the sampling frequency.
The output impedance of an op amp can be modeled with a
series inductor and resistor. When a capacitive load is switched
onto the output of the op amp, the output will momentarily
drop due to its effective output impedance. As the output recovers, ringing may occur. To remedy the situation, a series
resistor can be inserted between the op amp and the SHA
input as shown in Figure 15. The series resistance helps isolate
the op amp from the switched-capacitor load. REV. A The effect of this increased capacitive load on the op amp driving the AD9224 should be evaluated. To optimize performance
when noise is the primary consideration, increase the shunt
capacitance as much as the transient response of the input signal
will allow. Increasing the capacitance too much may adversely
affect the op amp’s settling time, frequency response and distortion performance. –9–