Datasheet AD9051 (Analog Devices) - 6

AD9051 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description
1, 6, 7, 12, 21, 23 GND Ground 2, 8, 11 VD Analog 5 V Power Supply 3 VREFOUT Internal Bandgap Voltage Reference (Nominally 2.5 V) 4 VREFIN Input to Reference Amplifier. Voltage reference for ADC is connected here. 5 BWSEL Bandwidth Select. NC = 130 MHz nominal. +VD = 50 MHz nominal. 9 AINB Complementary Analog Input Pin (Analog Input Bar) 10 AIN Analog Input Pin 13 ENCODE Encode Clock Input to ADC. Internal T/H is placed in hold mode (ADC is encoding) on rising edge of encode signal. 14 OR Out of Range Signal. Logic “0” when analog input is in nominal range. Logic “1” when analog input is out of nominal range. 15 D9 (MSB) Most Significant Bit of ADC Output 16–19 D8–D5 Digital Output Bits of ADC 20, 22 VDD Digital Output Power Supply (Only Used by Digital Outputs) 24–27 D4–D1 Digital Output Bits of ADC 28 D0 (LSB) Least Significant Bit of ADC Output
PIN CONFIGURATION N N + 1 N + 2 N + 3 N + 4 N + 5 AIN 1 GND 28 D0 (LSB) t 2 V 27 D1 A D 3 VREFOUT 26 D2 ENCODE tEH tEL VREFIN 4 25 D3 tPD BWSEL 5 24 D4 DIGITAL 6 GND 23 GND OUTPUTS N – 5 N – 4 N – 3 N – 2 N – 1 N GND 7 AD9051 22 VDD TOP VIEW V 8 D (Not to Scale) 21 GND
Figure 1. Timing Diagram
AINB 9 20 VDD AIN 10 19 D5 VD VD V 11 18 D6 D GND 12 17 D7 12k
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12k
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ENCODE 13 16 D8 INPUT BUFFER ENCODE OR 14 AINB (PIN 9) 15 D9 (MSB) (PIN 13) AIN (PIN 10) 12k
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12k
⍀ Analog Input Encode
VDD (PINS 20, 22) +3V TO +5V VD D0–D9, OR VREFOUT (PIN 3)
Output Stage VREF Figure 2. Equivalent Circuits REV. C –5–