Datasheet AD7819 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | +2.7 V to +5.5 V, 200 kSPS 8-Bit Sampling ADC |
| 页数 / 页 | 12 / 3 — AD7819–SPECIFICATIONS1 (GND = 0 V, VREF = VDD = 3 V. 10% to 5 V. 10%. All … |
| 修订版 | B |
| 文件格式/大小 | PDF / 186 Kb |
| 文件语言 | 英语 |
AD7819–SPECIFICATIONS1 (GND = 0 V, VREF = VDD = 3 V. 10% to 5 V. 10%. All specifications –40. to +125
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AD7819–SPECIFICATIONS1 (GND = 0 V, VREF = VDD = 3 V 10% to 5 V 10%. All specifications –40 C to +125 C unless otherwise noted.) Parameter Y Version Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 30 kHz, fSAMPLE = 136 kHz Signal to (Noise + Distortion) Ratio1 48 dB min Total Harmonic Distortion (THD)1 –70 dB typ Peak Harmonic or Spurious Noise1 –70 dB typ Intermodulation Distortion2 fa = 29.1 kHz; fb = 29.8 kHz 2nd Order Terms –77 dB typ 3rd Order Terms –77 dB typ DC ACCURACY Resolution 8 Bits Minimum Resolution for Which No Missing Codes Are Guaranteed 8 Bits Relative Accuracy1 ±0.5 LSB max Differential Nonlinearity (DNL)1 ±0.5 LSB max Total Unadjusted Error1 ±1 LSB max Gain Error1 ±0.5 LSB max Offset Error1 ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 V min VREF V max Input Leakage Current2 ±1 µA max Input Capacitance2 15 pF mx REFERENCE INPUTS2 VREF Input Voltage Range 1.2 V min VDD V max Input Leakage Current ±1 µA max Input Capacitance 20 pF max LOGIC INPUTS2 VINH, Input High Voltage 2.0 V min VINL, Input Low Voltage 0.4 V max (0.8 V max, VDD = 5 V) Input Current, IIN ±1 µA max Typically 10 nA, VIN = 0 V to VDD Input Capacitance, CIN 8 pF max LOGIC OUTPUTS Output High Voltage, VOH 2.4 V min ISOURCE = 200 µA Output Low Voltage, VOL 0.4 V max ISINK = 200 µA High Impedance Leakage Current ±1 µA max High Impedance Capacitance 15 pF max CONVERSION RATE Conversion Time 4.5 µs max Track/Hold Acquisition Time1 100 ns max See DC Acquisition Section POWER SUPPLY VDD 2.7–5.5 Volts For Specified Performance IDD Digital Inputs = 0 V or VDD Normal Operation 3.5 mA max Power-Down 1 µA max VDD = 5 V Power Dissipation Normal Operation 17.5 mW max VDD = 5 V Power-Down 5 µW max Auto Power-Down (Mode 2) VDD = 3 V 1 kSPS Throughput 57.75 µW max 10 kSPS Throughput 577.5 µW max 50 kSPS Throughput 2.89 mW max NOTES 1See Terminology section. 2Sample tested during initial release and after any redesign or process change that may affect this parameter. Specifications subject to change without notice. –2– REV. B
DYNAMIC PERFORMANCE fIN = 30 kHz, fSAMPLE = 136 kHz Signal to (Noise + Distortion) Ratio1 48 dB min Total Harmonic Distortion (THD)1 –70 dB typ Peak Harmonic or Spurious Noise1 –70 dB typ Intermodulation Distortion2 fa = 29.1 kHz; fb = 29.8 kHz 2nd Order Terms –77 dB typ 3rd Order Terms –77 dB typ DC ACCURACY Resolution 8 Bits Minimum Resolution for Which No Missing Codes Are Guaranteed 8 Bits Relative Accuracy1 ±0.5 LSB max Differential Nonlinearity (DNL)1 ±0.5 LSB max Total Unadjusted Error1 ±1 LSB max Gain Error1 ±0.5 LSB max Offset Error1 ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 V min VREF V max Input Leakage Current2 ±1 µA max Input Capacitance2 15 pF mx REFERENCE INPUTS2 VREF Input Voltage Range 1.2 V min VDD V max Input Leakage Current ±1 µA max Input Capacitance 20 pF max LOGIC INPUTS2 VINH, Input High Voltage 2.0 V min VINL, Input Low Voltage 0.4 V max (0.8 V max, VDD = 5 V) Input Current, IIN ±1 µA max Typically 10 nA, VIN = 0 V to VDD Input Capacitance, CIN 8 pF max LOGIC OUTPUTS Output High Voltage, VOH 2.4 V min ISOURCE = 200 µA Output Low Voltage, VOL 0.4 V max ISINK = 200 µA High Impedance Leakage Current ±1 µA max High Impedance Capacitance 15 pF max CONVERSION RATE Conversion Time 4.5 µs max Track/Hold Acquisition Time1 100 ns max See DC Acquisition Section POWER SUPPLY VDD 2.7–5.5 Volts For Specified Performance IDD Digital Inputs = 0 V or VDD Normal Operation 3.5 mA max Power-Down 1 µA max VDD = 5 V Power Dissipation Normal Operation 17.5 mW max VDD = 5 V Power-Down 5 µW max Auto Power-Down (Mode 2) VDD = 3 V 1 kSPS Throughput 57.75 µW max 10 kSPS Throughput 577.5 µW max 50 kSPS Throughput 2.89 mW max NOTES 1See Terminology section. 2Sample tested during initial release and after any redesign or process change that may affect this parameter. Specifications subject to change without notice. –2– REV. B