Datasheet AD7810 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 2.7 V to 5.5 V, 2 ms, 10-Bit ADC in 8-Lead microSOIC/DIP |
| 页数 / 页 | 12 / 5 — AD7810. PIN FUNCTION DESCRIPTIONS. Pin No. Mnemonic. Description. PIN … |
| 修订版 | B |
| 文件格式/大小 | PDF / 185 Kb |
| 文件语言 | 英语 |
AD7810. PIN FUNCTION DESCRIPTIONS. Pin No. Mnemonic. Description. PIN CONFIGURATION. DIP/SOIC. CONVST 1. 8 VDD. IN+. SCLK. TOP VIEW. IN–
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AD7810 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description
1 CONVST Convert Start. Falling edge puts the track-and-hold into hold mode and initiates a conversion. A rising edge on the CONVST pin enables the serial port of the AD7810. This is useful in multi- package applications where a number of devices share the same serial bus. The state of this pin at the end of conversion also determines whether the part is powered down or not. See Operating Modes section of this data sheet. 2 VIN+ Positive input of the pseudo differential analog input. 3 VIN– Negative input of the pseudo differential analog input. 4 GND Ground reference for analog and digital circuitry. 5 VREF External reference is connected here. 6 DOUT Serial data is shifted out on this pin. 7 SCLK Serial Clock. An external serial clock is applied here. 8 V Positive Supply Voltage 2.7 V to 5.5 V. DD
PIN CONFIGURATION DIP/SOIC CONVST 1 8 VDD V 2 AD7810 7 IN+ SCLK TOP VIEW V 3 IN– (Not to Scale) 6 DOUT GND 4 5 VREF Typical Performance Characteristics 10 –15 2048 POINT FFT SAMPLING 357.142kSPS FIN = 30kHz 1 –35 mW – dBs –55 POWER 0.1 –75 –95 0.01 –115 1 0 10 20 30 40 50 23 45 67 89 111 133 155 177 199 221 243 265 287 309 331 353 375 397 419 441 463 485 507 529 551 573 595 617 639 661 683 705 727 749 771 793 815 837 859 881 903 925 947 969 991 1013 THROUGHPUT – kSPS FREQUENCY BINS
Figure 2. Power vs. Throughput Figure 3. AD7810 SNR –4– REV. B
1 CONVST Convert Start. Falling edge puts the track-and-hold into hold mode and initiates a conversion. A rising edge on the CONVST pin enables the serial port of the AD7810. This is useful in multi- package applications where a number of devices share the same serial bus. The state of this pin at the end of conversion also determines whether the part is powered down or not. See Operating Modes section of this data sheet. 2 VIN+ Positive input of the pseudo differential analog input. 3 VIN– Negative input of the pseudo differential analog input. 4 GND Ground reference for analog and digital circuitry. 5 VREF External reference is connected here. 6 DOUT Serial data is shifted out on this pin. 7 SCLK Serial Clock. An external serial clock is applied here. 8 V Positive Supply Voltage 2.7 V to 5.5 V. DD
PIN CONFIGURATION DIP/SOIC CONVST 1 8 VDD V 2 AD7810 7 IN+ SCLK TOP VIEW V 3 IN– (Not to Scale) 6 DOUT GND 4 5 VREF Typical Performance Characteristics 10 –15 2048 POINT FFT SAMPLING 357.142kSPS FIN = 30kHz 1 –35 mW – dBs –55 POWER 0.1 –75 –95 0.01 –115 1 0 10 20 30 40 50 23 45 67 89 111 133 155 177 199 221 243 265 287 309 331 353 375 397 419 441 463 485 507 529 551 573 595 617 639 661 683 705 727 749 771 793 815 837 859 881 903 925 947 969 991 1013 THROUGHPUT – kSPS FREQUENCY BINS
Figure 2. Power vs. Throughput Figure 3. AD7810 SNR –4– REV. B