Datasheet AD7722 (Analog Devices)

16-Bit, 195 kSPS CMOS, - ADC AD7722 FEATURES FUNCTIONAL BLOCK DIAGRAM 16-Bit - ADC DGND DV AGND AV DD DD REF1 64 Oversampling Ratio Up to 220 kSPS Output Word Rate Low-Pass, Linear Phase Digital Filter AD7722 2.5V REF2 Inherently Monotonic REFERENCE On-Chip 2.5 V Voltage Reference 16-BIT A/D CONVERTER V Single-Supply 5 V IN (+) - FIR High Speed Parallel or Serial Interface VIN (–) MODULATOR FILTER P/S CLOCK XTAL CIRCUITRY CLKIN CAL UNI RESET SYNC DB15 CS DB14 DVAL/ RD DB13 CFMT/DRDY DB12 DB0 CONTROL DB11 DB1 LOGIC DB10 DB2 DB9/FSO GENERAL DESCRIPTION DB3/ DB4/ DB5/ DB6/ DB7/ DB8/
The AD7722 is a complete low power, 16-bit,
TSI DOE SFMT FSI SCO SDO
Σ-∆ ADC. The part operates from a 5 V supply and accepts a differential input voltage range of 0 V to +2.5 V or ± 1.25 V centered around a common-mode bias. The AD7722 provides 16-bit performance for input bandwidths up to 90.625 kHz. The part provides data Conversion data is provided at the output register through a flex- at an output word rate of 195.3 kHz. ible serial port or a parallel port. This offers 3-wire, high speed The analog input is continuously sampled by an analog modula- interfacing to digital signal processors. The serial interface operates tor, eliminating the need for external sample-and-hold circuitry. in an internal clocking (master) mode, whereby an internal serial The modulator output is processed by two finite impulse response data clock and framing pulse are device outputs. Additionally, (FIR) digital filters in series. The on-chip filtering reduces the two AD7722s can be configured with the serial data outputs external antialias requirements to first order, in most cases. The connected together. Each converter alternately transmits its conver- group delay for the filter is 215.5 µs, while the settling time for sion data on a shared serial data line. a step input is 431 µs. The sample rate, filter corner frequency, The part provides an accurate on-chip 2.5 V reference. A and output word rate are set by an external clock that is reference input/output function is provided to allow either the nominally 12.5 MHz. internal reference or an external system reference to be used as Use of a single bit DAC in the modulator guarantees excellent the reference source for the part. linearity and dc accuracy. Endpoint accuracy is ensured on-chip The AD7722 is available in a 44-lead MQFP package and is by calibration. This calibration procedure minimizes the zero- specified over the industrial temperature range of –40°C to +85°C. scale and full-scale errors. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that
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Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE TIMING SPECIFICATIONS PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION PARALLEL MODE PIN FUNCTION DESCRIPTIONS SERIAL MODE PIN FUNCTION DESCRIPTIONS TERMINOLOGY Signal-to-Noise Plus Distortion Ratio (S/(N+D)) Total Harmonic Distortion (THD) Spurious-Free Dynamic Range (SFDR) Intermodulation Distortion Pass-Band Ripple Pass-Band Frequency Cutoff Frequency Stop-Band Frequency Stop-Band Attenuation Integral Nonlinearity Differential Nonlinearity Common-Mode Rejection Ratio Unipolar Offset Error Bipolar Offset Error Gain Error Typical Performance Characteristics CIRCUIT DESCRIPTION APPLYING THE AD7722 Analog Input Range Differential Inputs Applying the Reference Input Circuits Clock Generation Varying the Master Clock SYSTEM SYNCHRONIZATION AND CONTROL SYNC Input DVAL Reset Input Power-On Reset Offset and Gain Calibration DATA INTERFACING Parallel Interface SERIAL INTERFACE 2-Channel Multiplexed Operation Serial Interfacing to DSPs OUTLINE DIMENSIONS Revision History