Datasheet AD9221, AD9223, AD9220 (Analog Devices)

Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters AD9221/AD9223/AD9220 FEATURES FUNCTIONAL BLOCK DIAGRAM Monolithic 12-Bit A/D Converter Product Family Family Members Are: AD9221, AD9223, and AD9220 CLK AVDD DVDD Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS, and SHA 10.0 MSPS VINA MDAC1 MDAC2 MDAC3 GAIN = 16 GAIN = 8 GAIN = 4 Low Power Dissipation: 59 mW, 100 mW, and 250 mW VINB 5 4 3 Single 5 V Supply A/D A/D A/D A/D CAPT Integral Nonlinearity Error: 0.5 LSB 5 4 3 3 CAPB Differential Nonlinearity Error: 0.3 LSB DIGITAL CORRECTION LOGIC 12 Input Referred Noise: 0.09 LSB VREF OUTPUT BUFFERS OTR Complete On-Chip Sample-and-Hold Amplifier and SENSE BIT 1 Voltage Reference (MSB) 1V MODE SELECT BIT 12 Signal-to-Noise and Distortion Ratio: 70 dB AD9221/AD9223/AD9220 (LSB) Spurious-Free Dynamic Range: 86 dB REFCOM AVSS DVSS CML Out-of-Range Indicator
amplifier (SHA) is equally suited for both multiplexed sys-
Straight Binary Output Data
tems that switch full-scale voltage levels in successive channels
28-Lead SOIC and 28-Lead SSOP
as well as sampling single-channel inputs at frequencies up to
GENERAL DESCRIPTION
and beyond the Nyquist rate. Also, the AD9221/AD9223/AD9220 The AD9221, AD9223, and AD9220 are a generation of high is well suited for communication systems employing Direct- performance, single supply 12-bit analog-to-digital converters. IF down conversion since the SHA in the differential input Each device exhibits true 12-bit linearity and temperature drift mode can achieve excellent dynamic performance far beyond its performance1 as well as 11.5-bit or better ac performance.2 The specified Nyquist frequency.2 AD9221/AD9223/AD9220 share the same interface options, A single clock input is used to control all internal conversion package, and pinout. Thus, the product family provides an upward cycles. The digital output data is presented in straight binary or downward component selection path based on performance, output format. An out-of-range (OTR) signal indicates an over- sample rate and power. The devices differ with respect to their flow condition that can be used with the most significant bit to specified sampling rate, and power consumption, which is reflected determine low or high overflow. in their dynamic performance over frequency. The AD9221/AD9223/AD9220 combine a low cost, high speed
PRODUCT HIGHLIGHTS
CMOS process and a novel architecture to achieve the resolution The AD9221/AD9223/AD9220 family offers a complete single- and speed of existing hybrid and monolithic implementations at chip sampling 12-bit, analog-to-digital conversion function in a fraction of the power consumption and cost. Each device is a pin compatible 28-lead SOIC and SSOP packages. complete, monolithic ADC with an on-chip, high performance, Flexible Sampling Rates—The AD9221, AD9223, and AD9220 low noise sample-and-hold amplifier and programmable voltage offer sampling rates of 1.5 MSPS, 3.0 MSPS, and 10.0 MSPS, reference. An external reference can also be chosen to suit the respectively. dc accuracy and temperature drift requirements of the application. The devices use a multistage differential pipelined architecture Low Power and Single Supply—The AD9221, AD9223, and with digital output error correction logic to provide 12-bit accu- AD9220 consume only 59 mW, 100 mW, and 250 mW, respec- racy at the specified data rates and to guarantee no missing tively, on a single 5 V power supply. codes over the full operating temperature range. Excellent DC Performance Over Temperature—The AD9221/ The input of the AD9221/AD9223/AD9220 is highly flexible, AD9223/AD9220 provide 12-bit linearity and temperature drift allowing for easy interfacing to imaging, communications, medi- performance.1 cal, and data-acquisition systems. A truly differential input Excellent AC Performance and Low Noise—The AD9221/ structure allows for both single-ended and differential input AD9223/AD9220 provide better than 11.3 ENOB performance interfaces of varying input spans. The sample-and-hold and have an input referred noise of 0.09 LSB rms.2 NOTES Flexible Analog Input Range—The versatile on-board sample- 1Excluding internal voltage reference. and-hold (SHA) can be configured for either single-ended or 2Depends on the analog input configuration. differential inputs of varying input spans. REV. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS Integral Nonlinearity (INL) Differential Nonlinearity (DNL, No Missing Codes) Zero Error Gain Error Temperature Drift Power Supply Rejection Aperture Jitter Aperture Delay Signal-to-Noise and Distortion (S/N+D, SINAD) Ratio Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Spurious Free Dynamic Range (SFDR) Typical Performance Characteristics INTRODUCTION ANALOG INPUT AND REFERENCE OVERVIEW ANALOG INPUT OPERATION REFERENCE OPERATION DRIVING THE ANALOG INPUTS Introduction SINGLE-ENDED MODE OF OPERATION DC COUPLING AND INTERFACE ISSUES Simple Op Amp Buffer Op Amp with DC Level Shifting AC COUPLING AND INTERFACE ISSUES Simple AC Interface Alternative AC Interface Op Amp Selection Guide DIFFERENTIAL MODE OF OPERATION REFERENCE CONFIGURATIONS USING THE INTERNAL REFERENCE Single-Ended Input with 0 to 2 VREF Range Single-Ended or Differential Input, VCM = 2.5 V VINA Resistor Programmable Reference USING AN EXTERNAL REFERENCE Variable Input Span with VCM = 2.5 V Single-Ended Input with 0 to 2 VREF Range Low Cost/Power Reference DIGITAL INPUTS AND OUTPUTS Digital Outputs Out Of Range (OTR) Digital Output Driver Considerations (DVDD) Clock Input and Considerations GROUNDING AND DECOUPLING Analog and Digital Grounding Analog and Digital Supply Decoupling APPLICATIONS Direct IF Down Conversion Using the AD9220 Multichannel Data Acquisition with Autocalibration OUTLINE DIMENSIONS Revision History