Datasheet AD7715 (Analog Devices)

3 V/5 V, 450 µA 16-Bit, Sigma-Delta ADC Data Sheet AD7715 FEATURES FUNCTIONAL BLOCK DIAGRAM Charge-balancing ADC REF IN(–) REF IN(+) AVDD DVDD 16-bits no missing codes CHARGE BALANCING 0.0015% nonlinearity ADC Programmable gain front end Σ-Δ DIGITAL AIN(+) MODULATOR FILTER Gains of 1, 2, 32 and 128 BUFFER PGA AIN(–) Differential input capability A = 1 TO 128 CLOCK MCLK IN Three-wire serial interface GENERATION MCLK OUT SPI-, QSPI™-, MICROWIRE™-, and DSP-compatible SERIAL RESET INTERFACE Ability to buffer the analog input SCLK REGISTER BANK CS 3 V (AD7715-3) or 5 V (AD7715-5) operation DIN Low supply current: 450 µA maximum @ 3 V supplies DOUT AD7715 DRDY Low-pass filter with programmable output update
001
16-lead SOIC/PDIP/TSSOP AGND DGND
08519- Figure 1.
GENERAL DESCRIPTION
The AD7715 is a complete analog front end for low frequency CMOS construction ensures very low power dissipation, and measurement applications. The part can accept low level input power-down mode reduces the standby power consumption to signals directly from a transducer and outputs a serial digital 50 µW typical. The part is available in a 16-lead, 0.3 inch-wide, word. It employs a Σ-Δ conversion technique to realize up to plastic dual-in-line package (PDIP) as well as a 16-lead 0.3 inch 16 bits of no missing codes performance. The input signal is wide smal outline (SOIC_W) package and a 16-lead TSSOP applied to a proprietary programmable gain front end based package. around an analog modulator. The modulator output is processed by an on-chip digital filter. The first notch of this digital filter
PRODUCT HIGHLIGHTS
can be programmed via the on-chip control register allowing 1. The AD7715 consumes less than 450 µA in total supply adjustment of the filter cutoff and output update rate. current at 3 V supplies and 1 MHz master clock, making it The AD7715 features a differential analog input as well as a ideal for use in low-power systems. Standby current is less differential reference input. It operates from a single supply (3 V than 10 µA. or 5 V). It can handle unipolar input signal ranges of 0 mV to 2. The programmable gain input allows the AD7715 to accept 20 mV, 0 mV to 80 mV, 0 V to 1.25 V and 0 V to 2.5 V. It can input signals directly from a strain gage or transducer also handle bipolar input signal ranges of ±20 mV, ±80 mV, removing a considerable amount of signal conditioning. ±1.25 V and ±2.5 V. These bipolar ranges are referenced to the 3. The AD7715 is ideal for microcontroller or DSP processor negative input of the differential analog input. The AD7715 applications with a three-wire serial interface reducing the thus performs all signal conditioning and conversion for a number of interconnect lines and reducing the number single channel system. of optocouplers required in isolated systems. The part contains on-chip registers which allow software control The AD7715 is ideal for use in smart, microcontroller, or DSP- over output update rate, input gain, signal polarity, and based systems. It features a serial interface that can be configured calibration modes. for three-wire operation. Gain settings, signal polarity, and 4. The part features excellent static performance specifications update rate selection can be configured in software using the with 16-bits no missing codes, ±0.0015% accuracy, and low input serial port. The part contains self-calibration and system rms noise (<550 nV). Endpoint errors and the effects of calibration options to eliminate gain and offset errors on the temperature drift are eliminated by on-chip calibration part itself or in the system. options, which remove zero-scale and ful -scale errors.
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Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7715-5 AD7715-3 TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY ON-CHIP REGISTERS COMMUNICATIONS REGISTER (RS1, RS0 = 0, 0) SETUP REGISTER (RS1, RS0 = 0, 1); POWER ON/RESET STATUS: 28 HEX TEST REGISTER (RS1, RS0 = 1, 0) DATA REGISTER (RS1, RS0 = 1, 1) OUTPUT NOISE AD7715-5 AD7715-3 CALIBRATION SEQUENCES CIRCUIT DESCRIPTION ANALOG INPUT Analog Input Ranges Input Sample Rate Bipolar/Unipolar Inputs REFERENCE INPUT DIGITAL FILTERING Filter Characteristics Post-Filtering ANALOG FILTERING CALIBRATION Self-Calibration System Calibration Span and Offset Limits Power-Up and Calibration USING THE AD7715 CLOCKING AND OSCILLATOR CIRCUIT SYSTEM SYNCHRONIZATION RESET INPUT STANDBY MODE ACCURACY DRIFT CONSIDERATIONS POWER SUPPLIES Supply Current Grounding and Layout Evaluating the AD7715 Performance DIGITAL INTERFACE CONFIGURING THE AD7715 MICROCONTROLLER/MICROPROCESSOR INTERFACING AD7715 TO 68HC11 INTERFACE AD7715 TO 8XC51 INTERFACE AD7715 TO ADSP-2184N/ADSP-2185N/ ADSP-2186N/ADSP-2187N/ADSP-2188N/ ADSP-2189N INTERFACE CODE FOR SETTING UP THE AD7715 C CODE FOR INTERFACING AD7715 TO 68HC11 APPLICATIONS INFORMATION PRESSURE MEASUREMENT TEMPERATURE MEASUREMENT SMART TRANSMITTERS OUTLINE DIMENSIONS ORDERING GUIDE