Datasheet AD7893 (Analog Devices) - 10

AD7893
The AD7893 counts the serial clock edges to know which bit The serial clock rate from the 8XC51 is limited to significantly from the output register should be placed on the SDATA out- less than the allowable input serial clock frequency with which put. To ensure that the part does not lose synchronization, the the AD7893 can operate. As a result, the time to read data from serial clock counter is reset on the falling edge of the CONVST the part will actually be longer than the conversion time of the input, provided the SCLR line is low. The user should ensure part. This means that the AD7893 cannot run at its maximum that a falling edge on the CONVST input does not occur while throughput rate when used with the 8XC51. a serial data read operation is in progress.
AD7893-68HC11 Interface
An interface circuit between the AD7893 and the 68HC11
MICROPROCESSOR/MICROCONTROLLER INTERFACE
microcontroller is shown in Figure 7. For the interface shown, The AD7893 provides a two-wire serial interface that can be the 68HC11 SPI port is used, and the 68HC11 is configured in used for connection to the serial ports of DSP processors and its single-chip mode. The 68HC11 is configured in the master microcontrollers. Figures 6 through 9 show the AD7893 inter- mode with its CPOL bit set to a logic zero and its CPHA bit set faced to a number of different microcontrollers and DSP pro- to a logic one. As with the previous interface, the diagram shows cessors. The AD7893 accepts an external serial clock and, as a the simplest form of the interface where the AD7893 is the only result, in all interfaces shown here, the processor/controller is part connected to the serial port of the 68HC11 and, therefore, configured as the master, providing the serial clock with the no decoding of the serial read operations is required. It also AD7893 configured as the slave in the system. makes no provisions for monitoring when conversion is com-
AD7893-8051 Interface
plete on the AD7893. Figure 6 shows an interface between the AD7893 and the Once again, either of these two tasks can readily be accom- 8XC51 microcontroller. The 8XC51 is configured for its Mode plished with minor modifications to the interface. To chip select 0 serial interface mode. The diagram shows the simplest form of the AD7893 in systems where more than one device is con- the interface where the AD7893 is the only part connected to nected to the 68HC11’s serial port, a port bit, configured as an the serial port of the 8XC51 and, therefore, no decoding of the output from one of the 68HC11’s parallel ports, can be used to serial read operations is required. It also makes no provisions for gate on or off the serial clock to the AD7893. A simple AND monitoring when conversion is complete on the AD7893. function on this port bit and the serial clock from the 68HC11 Either of these two tasks can readily be accomplished with minor will provide this function. The port bit should be high to select modifications to the interface. To chip select the AD7893 in the AD7893 and low when it is not selected. systems where more than one device is connected to the 8XC51’s To monitor the conversion time on the AD7893, a scheme such serial port, a port bit configured as an output from one of the as outlined in the previous interface with CONVST can be 8XC51’s parallel ports can be used to gate on or off the serial used. This can be implemented in two ways. One is to connect clock to the AD7893. A simple AND function on this port bit the CONVST line to another parallel port bit that is configured and the serial clock from the 8XC51 will provide this function. as an input. This port bit can then be polled to determine when The port bit should be high to select the AD7893 and low when conversion is complete. An alternative is to use an interrupt it is not selected. driven system, in which case the CONVST line should be con- To monitor the conversion time on the AD7893, a scheme such nected to the IRQ input of the 68HC11. as previously outlined with CONVST can be used. This can be The serial clock rate from the 68HC11 is limited to significantly implemented in two ways. One is to connect the CONVST line less than the allowable input serial clock frequency with which to another parallel port bit that is configured as an input. This the AD7893 can operate. As a result, the time to read data from port bit can then be polled to determine when conversion is the part will actually be longer than the conversion time of the complete. An alternative is to use an interrupt driven system, in part. This means that the AD7893 cannot run at its maximum which case the CONVST line should be connected to the INT1 throughput rate when used with the 68HC11. input of the 8XC51.
68HC11 AD7893 8XC51 AD7893 SCK SCLK P3.0 SDATA MISO SDATA P3.1 SCLK
Figure 7. AD7893 to 68HC11 Interface Figure 6. AD7893 to 8XC51 Interface REV. E –9–