Datasheet ADL5566 (Analog Devices) - 4

制造商Analog Devices
描述4.5 GHz Ultrahigh Dynamic Range, Dual Differential Amplifier
页数 / 页25 / 4 — Data Sheet. ADL5566. SPECIFICATIONS. Table 1. Test Conditions/. 3.3 V. 5 …
修订版A
文件格式/大小PDF / 838 Kb
文件语言英语

Data Sheet. ADL5566. SPECIFICATIONS. Table 1. Test Conditions/. 3.3 V. 5 V. Parameter. Comments. Min. Typ. Max Min. Max Unit

Data Sheet ADL5566 SPECIFICATIONS Table 1 Test Conditions/ 3.3 V 5 V Parameter Comments Min Typ Max Min Max Unit

该数据表的模型线

文件文字版本

Data Sheet ADL5566 SPECIFICATIONS
VS = 3.3 V, VCM = 1.65 V, VS = 5 V, VCM = 2.5 V, RL = 200 Ω differential, AV = 16 dB, CL = 1 pF differential, f = 100 MHz, TA = 25°C, parameters specified as ac-coupled differential input and differential output, unless otherwise noted.
Table 1. Test Conditions/ 3.3 V 5 V Parameter Comments Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth AV = 16 dB, VOUT ≤ 0.5 V p-p 4500 4500 MHz Bandwidth 0.1 dB Flatness VOUT ≤ 1.0 V p-p 500 500 MHz Gain Accuracy ±1 ±1 dB Gain Error ≤1000 MHz, Channel A to ≤0.02 ≤0.02 dB Channel B Phase Error ≤1000 MHz, Channel A to ≤0.5 ≤0.5 Degrees Channel B Gain Supply Sensitivity VS ± 5% 3.4 5.6 mdB/V Gain Temperature Sensitivity −40°C to +85°C 0.5 0.5 mdB/°C Slew Rate Rise, AV = 16 dB, RL = 200 Ω, 16 18 V/ns VOUT = 2 V step Fal , AV = 16 dB, RL = 200 Ω, 18 20 V/ns VOUT = 2 V step Settling Time 2 V step to 1% 890 750 ps Overdrive Recovery Time VIN = 4 V to 0 V step, 2.5 2.5 ns VOUT ≤ ±10 mV Reverse Isolation (S12) 75 75 dB Channel Isolation Channel A-to-Channel B 82.5 82.5 dB AV = 16 dB INPUT/OUTPUT CHARACTERISTICS Input Common-Mode Range 1.2 1.8 1.3 3.5 V Input Resistance (Differential) AV = 16 dB 160 160 Ω Input Resistance (Single-Ended) AV = 14 dB 150 150 Ω Input Capacitance (Single-Ended) 1.1 1.1 pF Input Bias Current ±5 ±5 µA CMRR 44 44 dB Output Common-Mode Range 1.25 1.8 1.25 3 V Output Common-Mode Offset Referenced to VCC/2 −100 +20 −100 +20 mV Output Common-Mode Drift −40°C to +85°C 2 3.5 mV/°C Output Differential Offset Voltage −20 +20 −20 +20 mV Output Differential Offset Drift −40°C to +85°C 1.1 1.7 mV/°C Output Resistance (Differential) 11 11 Ω Maximum Output Voltage Swing 1 dB compressed 3.4 5 V p-p POWER INTERFACE Supply Voltage 2.8 3.3 5.2 2.8 5 5.2 V ENBL1/ENBL2 Threshold Device disabled, ENBL low 0.5 0.6 V Device enabled, ENBL high 1.5 1.5 V ENBL1/ENBL2 Input Bias Current ENBL high 500 500 nA ENBL low −165 −165 µA Quiescent Current ENBL high 140 150 160 175 mA ENBL low 7 9 mA Rev. A | Page 3 of 24 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Circuit Description Applications Information Basic Connections Input and Output Interfacing Single-Ended Input to Differential Output Gain Adjustment and Interfacing ADC Interfacing DC-Coupled Receiver Application Layout Considerations Soldering Information and Recommended Land Pattern Evaluation Board Outline Dimensions Ordering Guide