Datasheet ADA4930-1-EP (Analog Devices) - 7

制造商Analog Devices
描述Ultralow Noise Drivers for Low Voltage ADCs
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Enhanced Product. ADA4930-1-EP. ABSOLUTE MAXIMUM RATINGS Table 7. Parameter. Rating. THERMAL RESISTANCE. 3.0. TJ = 150°C. 2.5. (W N. IO T

Enhanced Product ADA4930-1-EP ABSOLUTE MAXIMUM RATINGS Table 7 Parameter Rating THERMAL RESISTANCE 3.0 TJ = 150°C 2.5 (W N IO T

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Enhanced Product ADA4930-1-EP ABSOLUTE MAXIMUM RATINGS Table 7.
The power dissipated in the package (PD) is the sum of the
Parameter Rating
quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage Supply Voltage 5.5 V between the supply pins (V Power Dissipation See Figure 3 S) times the quiescent current (IS). The power dissipated due to the load drive depends on the Storage Temperature Range −65°C to +125°C particular application. The power due to load drive is calculated Operating Temperature Range −55°C to +105°C by multiplying the load current by the associated voltage drop Lead Temperature (Soldering, 10 sec) 300°C across the device. RMS voltages and currents must be used in Junction Temperature 150°C these calculations. Stresses above those listed under Absolute Maximum Ratings Airflow increases heat dissipation, effectively reducing θJA. In may cause permanent damage to the device. This is a stress rating addition, more metal directly in contact with the package leads/ only; functional operation of the device at these or any other exposed pad from metal traces, through holes, ground, and conditions above those indicated in the operational section of power planes reduces θJA. this specification is not implied. Exposure to absolute maximum Figure 3 shows the maximum safe power dissipation vs. the rating conditions for extended periods may affect device reliability. ambient temperature for the ADA4930-1-EP single 16-lead
THERMAL RESISTANCE
LFCSP (81.6°C/W) on a JEDEC standard 4-layer board. θJA is specified for the device (including exposed pad) soldered
3.0
to a high thermal conductivity 2s2p circuit board, as described
TJ = 150°C )
in EIA/JESD51-7.The θ
2.5
JA for the 16-Lead LFCSP(exposed pad)
(W N
package is 81.6 °C/W.
IO T 2.0 PA 16-LEAD LFCSP MAXIMUM POWER DISSIPATION ISSI D 1.5
The maximum safe power dissipation in the ADA4930-1-EP package
ER W
is limited by the associated rise in junction temperature (TJ) on the
M PO 1.0
die. At approximately 150°C, which is the glass transition
MU
temperature, the plastic changes its properties. Even temporarily
XI MA 0.5
exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric
0.0
performance of the ADA4930-1-EP. Exceeding a junction
–55 –35 –15 5 25 45 65 85 105
004
AMBIENT TEMPERATURE (°C)
temperature of 150°C for an extended period can result in 10371- Figure 3. Maximum Power Dissipation vs. Ambient Temperature, changes in the silicon devices, potentially causing failure. 4-Layer Board
ESD CAUTION
Rev. A | Page 7 of 12 Document Outline Features Enhanced Product Features Applications General Description Functional Block Diagrams Revision History Specifications 3.3 V Operation 3.3 V VOCM to VO, cm Performance 3.3 V General Performance 5 V Operation 5 V VOCM to VO, cm Performance 5 V General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Outline Dimensions Ordering Guide