Data SheetADA4960-1PIN CONFIGURATION AND FUNCTION DESCRIPTIONSCMNDNDOPDGGV16151413VIP 112 VCCIIP 211 VOPADA4960-1TOP VIEWIIN 3(Not to Scale)10 VONVIN 49VCC5678NCNCCCCCVVNOTES 003 1. NC = NO CONNECT. 2. EXPOSED PAD MUST BE CONNECTED TO GND. 08458- Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No.MnemonicDescription 1 VIP Balanced Differential Input. This pin is internally biased to VCC/2. 2 IIP Gain Setting Resistor. Connect RG between this pin and IIN. 3 IIN Gain Setting Resistor. Connect RG between this pin and IIP. 4 VIN Balanced Differential Input. This pin is internally biased to VCC/2. 5, 6 NC Leave these pins unconnected. 7, 8, 9, 12 VCC Positive 5 V Supply Pins. 10 VON Balanced Differential Output. This pin is biased to the VOCM input voltage. 11 VOP Balanced Differential Output. This pin is biased to the VOCM input voltage. 13 VOCM This pin is internally biased at VCC/2. As an input, this pin sets the dc VOP and VON voltages. 14, 15 GND Ground. Connect this pin to a low impedance ground. 16 PD This pin grounded disables the part, and at 5 V, this pin turns the part on. EPAD The exposed pad must be connected to GND. Rev. A | Page 7 of 19 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Circuit Description Basic Structure Applications Information Basic Connections Input and Output Interfacing Gain Adjust Bandwidth Extension ADC Interfacing Line Driver Applications Overdrive and Recovery Layout, Grounding, and Bypassing Outline Dimensions Ordering Guide