Datasheet ADA4932-1/ADA4932-2 (Analog Devices) - 3

制造商Analog Devices
描述Low Power Differential ADC Driver
页数 / 页27 / 3 — Data Sheet. ADA4932-1/ADA4932-2. SPECIFICATIONS ±5 V OPERATION. ±DIN to …
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Data Sheet. ADA4932-1/ADA4932-2. SPECIFICATIONS ±5 V OPERATION. ±DIN to VOUT, dm Performance. Table 1. Parameter Test

Data Sheet ADA4932-1/ADA4932-2 SPECIFICATIONS ±5 V OPERATION ±DIN to VOUT, dm Performance Table 1 Parameter Test

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Data Sheet ADA4932-1/ADA4932-2 SPECIFICATIONS ±5 V OPERATION
TA = 25°C, +VS = 5 V, −VS = −5 V, VOCM = 0 V, RF = 499 Ω, RG = 499 Ω, RT = 53.6 Ω (when used), RL, dm = 1 kΩ, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 54 for signal definitions.
±DIN to VOUT, dm Performance Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth VOUT, dm = 0.1 V p-p 560 MHz VOUT, dm = 0.1 V p-p, RF = RG = 205 Ω 1000 MHz −3 dB Large Signal Bandwidth VOUT, dm = 2.0 V p-p 360 MHz VOUT, dm = 2.0 V p-p, RF = RG = 205 Ω 360 MHz Bandwidth for 0.1 dB Flatness VOUT, dm = 2.0 V p-p, ADA4932-1, RL = 200 Ω 300 MHz VOUT, dm = 2.0 V p-p, ADA4932-2, RL = 200 Ω 100 MHz Slew Rate VOUT, dm = 2 V p-p, 25% to 75% 2800 V/μs Settling Time to 0.1% VOUT, dm = 2 V step 9 ns Overdrive Recovery Time VIN = 0 V to 5 V ramp, G = 2 20 ns NOISE/HARMONIC PERFORMANCE See Figure 53 for distortion test circuit Second Harmonic VOUT, dm = 2 V p-p, 1 MHz −110 dBc VOUT, dm = 2 V p-p, 10 MHz −100 dBc VOUT, dm = 2 V p-p, 20 MHz −90 dBc VOUT, dm = 2 V p-p, 50 MHz −72 dBc Third Harmonic VOUT, dm = 2 V p-p, 1 MHz −130 dBc VOUT, dm = 2 V p-p, 10 MHz −120 dBc VOUT, dm = 2 V p-p, 20 MHz −105 dBc VOUT, dm = 2 V p-p, 50 MHz −80 dBc IMD f1 = 30 MHz, f2 = 30.1 MHz, VOUT, dm = 2 V p-p −91 dBc Voltage Noise (RTI) f = 1 MHz 3.6 nV/√Hz Input Current Noise f = 1 MHz 1.0 pA/√Hz Crosstalk f = 10 MHz, ADA4932-2 −100 dB INPUT CHARACTERISTICS Offset Voltage V+DIN = V−DIN = VOCM = 0 V −2.2 ±0.5 +2.2 mV TMIN to TMAX variation −3.7 μV/°C Input Bias Current −5.2 −2.5 −0.1 μA TMIN to TMAX variation −9.5 nA/°C Input Offset Current −0.2 ±0.025 +0.2 μA Input Resistance Differential 11 MΩ Common mode 16 MΩ Input Capacitance 0.5 pF Input Common-Mode Voltage Range −VS + 0.2 to V +VS − 1.8 CMRR ∆VOUT, dm/∆VIN, cm, ∆VIN, cm = ±1 V −100 −87 dB Open-Loop Gain 64 66 dB OUTPUT CHARACTERISTICS Output Voltage Swing Maximum ∆VOUT, single-ended output, −VS + 1.4 to −VS + 1.2 to V RF = RG = 10 kΩ, RL = 1 kΩ +VS − 1.4 +VS − 1.2 Linear Output Current 200 kHz, RL, dm = 10 Ω, SFDR = 68 dB 80 mA rms Output Balance Error ∆VOUT, cm/∆VOUT, dm, ∆VOUT, dm = 2 V p-p, 1 MHz, −64 −60 dB see Figure 52 for output balance test circuit Rev. E | Page 3 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance 5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION APPLICATIONS INFORMATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN ESTIMATING THE OUTPUT NOISE VOLTAGE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE FOR AN APPLICATION CIRCUIT Terminating a Single-Ended Input INPUT COMMON-MODE VOLTAGE RANGE INPUT AND OUTPUT CAPACITIVE AC COUPLING SETTING THE OUTPUT COMMON-MODE VOLTAGE HIGH PERFORMANCE PRECISION ADC DRIVER HIGH PERFORMANCE ADC DRIVING LAYOUT, GROUNDING, AND BYPASSING OUTLINE DIMENSIONS ORDERING GUIDE