Datasheet ADA4932-1/ADA4932-2 (Analog Devices) - 7

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Data Sheet ADA4932-1/ADA4932-2 ABSOLUTE MAXIMUM RATINGS Table 7.
The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the
Parameter Rating
package due to the load drive. The quiescent power is the voltage Supply Voltage 11 V between the supply pins (V Power Dissipation See Figure 3 S) times the quiescent current (IS). The power dissipated due to the load drive depends upon the Input Current, +IN, −IN, PD ±5 mA particular application. The power due to load drive is calculated Storage Temperature Range −65°C to +125°C by multiplying the load current by the associated voltage drop Operating Temperature Range across the device. RMS voltages and currents must be used in ADA4932-1 −40°C to +105°C these calculations. ADA4932-2 −40°C to +105°C Lead Temperature (Soldering, 10 sec) 300°C Airflow increases heat dissipation, effectively reducing θJA. In Junction Temperature 150°C addition, more metal directly in contact with the package leads/ exposed pad from metal traces, through holes, ground, and power Stresses at or above those listed under Absolute Maximum planes reduces θJA. Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these Figure 3 shows the maximum safe power dissipation in the or any other conditions above those indicated in the operational package vs. the ambient temperature for the single 16-lead section of this specification is not implied. Operation beyond LFCSP (91°C/W) and the dual 24-lead LFCSP (65°C/W) on a the maximum operating conditions for extended periods may JEDEC standard 4-layer board with the exposed pad soldered to affect product reliability. a PCB pad that is connected to a solid plane.
3.5 THERMAL RESISTANCE
θ
) 3.0
JA is specified for the device (including exposed pad) soldered
W (
to a high thermal conductivity 2s2p circuit board, as described
N IO 2.5 T
in EIA/JESD 51-7.
A ADA4932-2 IP ISS 2.0 Table 8. Thermal Resistance D Package Type θJA Unit WER 1.5
ADA4932-1, 16-Lead LFCSP (Exposed Pad) 91 °C/W
ADA4932-1 M PO
ADA4932-2, 24-Lead LFCSP (Exposed Pad) 65 °C/W
1.0 MU XI MA 0.5 MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the ADA4932-1/
0 –40 –20 0 20 40 60 80 100
04 2 2- ADA4932-2 package is limited by the associated rise in junction
AMBIENT TEMPERATURE (°C)
75 07 temperature (TJ) on the die. At approximately 150°C, which is Figure 3. Maximum Power Dissipation vs. Ambient Temperature for the glass transition temperature, the plastic changes its properties. a 4-Layer Board Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently
ESD CAUTION
shifting the parametric performance of the ADA4932-1/ ADA4932-2. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. Rev. E | Page 7 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance 5 V OPERATION ±DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION APPLICATIONS INFORMATION ANALYZING AN APPLICATION CIRCUIT SETTING THE CLOSED-LOOP GAIN ESTIMATING THE OUTPUT NOISE VOLTAGE IMPACT OF MISMATCHES IN THE FEEDBACK NETWORKS CALCULATING THE INPUT IMPEDANCE FOR AN APPLICATION CIRCUIT Terminating a Single-Ended Input INPUT COMMON-MODE VOLTAGE RANGE INPUT AND OUTPUT CAPACITIVE AC COUPLING SETTING THE OUTPUT COMMON-MODE VOLTAGE HIGH PERFORMANCE PRECISION ADC DRIVER HIGH PERFORMANCE ADC DRIVING LAYOUT, GROUNDING, AND BYPASSING OUTLINE DIMENSIONS ORDERING GUIDE