Data SheetAD8556ParameterSymbol ConditionsMin TypMax Unit DYNAMIC PERFORMANCE Gain Bandwidth Product GBP First gain stage, TA = 25°C 2 MHz Second gain stage, TA = 25°C 8 MHz Output buffer stage, TA = 25°C 1.5 MHz Output Buffer Slew Rate SR AV = 70, RL = 10 kΩ, CL = 100 pF, TA = 25°C 1.2 V/µs Settling Time ts To 0.1%, AV = 70, 4 V output step, TA = 25°C 8 µs NOISE PERFORMANCE Input Referred Noise TA = 25°C, f = 1 kHz 32 nV/√Hz Low Frequency Noise en p-p f = 0.1 Hz to 10 Hz, TA = 25°C 0.5 µV p-p Total Harmonic Distortion THD VIN = 16.75 mV rms, f = 1 kHz, −100 dB AV = 100, TA = 25°C DIGITAL INTERFACE Input Current 2 µA DIGIN Pulse Width to Load 0 tw0 TA = 25°C 0.05 10 µs DIGIN Pulse Width to Load 1 tw1 TA = 25°C 50 µs Time Between Pulses at DIGIN tws TA = 25°C 10 µs DIGIN Low TA = 25°C 1 V DIGIN High TA = 25°C 4 V DIGOUT Logic 0 TA = 25°C 1 V DIGOUT Logic 1 TA = 25°C 4 V Rev. B | Page 5 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN VALUES OPEN WIRE FAULT DETECTION SHORTED WIRE FAULT DETECTION FLOATING VPOS, VNEG, OR VCLAMP FAULT DETECTION DEVICE PROGRAMMING Digital Interface Initial State Simulation Mode Programming Mode Parity Error Detection Read Mode Sense Current Programming Procedure Determining Optimal Gain and Offset Codes EMI/RFI PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE