Datasheet AD524 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Precision Instrumentation Amplifier |
| 页数 / 页 | 29 / 10 — AD524. TYPICAL PERFORMANCE CHARACTERISTICS. A) 6. m (. E (±V). G A T. … |
| 修订版 | G |
| 文件格式/大小 | PDF / 497 Kb |
| 文件语言 | 英语 |
AD524. TYPICAL PERFORMANCE CHARACTERISTICS. A) 6. m (. E (±V). G A T. RRE. L 10. VO T. +25°C. NT E. C S. UI 2. SUPPLY VOLTAGE (±V). ) ±V. A 12. G (
该数据表的模型线
AD524
文件文字版本
AD524 TYPICAL PERFORMANCE CHARACTERISTICS 20 8 15 A) 6 m ( E (±V) NT G A T RRE L 10 4 CU VO T +25°C NT E PU C S IN E 5 UI 2 Q
005 008
0
0500- 0500- 0
0
0
0 5 10 15 20 0 5 10 15 20 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)
Figure 5. Input Voltage Range vs. Supply Voltage, G = 1 Figure 8. Quiescent Current vs. Supply Voltage
20 16 14 ) ±V ) 15 A 12 G ( ±n IN ( W NT 10 S GE 10 URRE 8 LTA C O AS V 6 T BI U UT TP 5 P 4 IN OU 2
006 009
0
0500- 0500- 0
0
0
0 5 10 15 20 0 5 10 15 20 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)
Figure 6. Output Voltage Swing vs. Supply Voltage Figure 9. Input Bias Current vs. Supply Voltage
30 40 30 p) p- V A) 20 ( n G 20 ( IN NT W E 10 S E G 0 CURR LTA AS O BI –10 10 T V U UT P TP –20 IN U O –30
007 010
0
0500- 0500- 0
–40
0
10 100 1k 10k –75 –25 25 75 125 LOAD RESISTANCE (Ω) TEMPERATURE (°C)
Figure 7. Output Voltage Swing vs. Load Resistance Figure 10. Input Bias Current vs. Temperature Rev. F | Page 9 of 28 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTOZERO CIRCUITS ERROR BUDGET ANALYSIS OUTLINE DIMENSIONS ORDERING GUIDE
005 008
0
0500- 0500- 0
0
0
0 5 10 15 20 0 5 10 15 20 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)
Figure 5. Input Voltage Range vs. Supply Voltage, G = 1 Figure 8. Quiescent Current vs. Supply Voltage
20 16 14 ) ±V ) 15 A 12 G ( ±n IN ( W NT 10 S GE 10 URRE 8 LTA C O AS V 6 T BI U UT TP 5 P 4 IN OU 2
006 009
0
0500- 0500- 0
0
0
0 5 10 15 20 0 5 10 15 20 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)
Figure 6. Output Voltage Swing vs. Supply Voltage Figure 9. Input Bias Current vs. Supply Voltage
30 40 30 p) p- V A) 20 ( n G 20 ( IN NT W E 10 S E G 0 CURR LTA AS O BI –10 10 T V U UT P TP –20 IN U O –30
007 010
0
0500- 0500- 0
–40
0
10 100 1k 10k –75 –25 25 75 125 LOAD RESISTANCE (Ω) TEMPERATURE (°C)
Figure 7. Output Voltage Swing vs. Load Resistance Figure 10. Input Bias Current vs. Temperature Rev. F | Page 9 of 28 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTOZERO CIRCUITS ERROR BUDGET ANALYSIS OUTLINE DIMENSIONS ORDERING GUIDE