Datasheet ADL5511 (Analog Devices) - 20

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Data Sheet ADL5511 APPLICATIONS INFORMATION C14 +5V 0.1µF C13 100pF VPOS 15 ADL5511 C17 400Ω 20pF 0.1µF BIAS AND POWER- FLT4 ENBL 4 14 VPOS DOWN CONTROL 100 Ω VRMS RMS C1 RMS G = 1.7 11 OUTPUT 100pF RFIN 2 R5 10kΩ 250Ω VENV 75Ω FLT1 ENVELOPE ENVELOPE G = 1.5 10 OUTPUT 3 C2 5pF 250Ω EREF ENVELOPE 9 100pF REFERENCE 400Ω 0.8pF 0.4pF VPOS VPOS 13 6 7 8 12 16 1 5 FLT2 FLT3 COMM NC C10 C6 (SEE TEXT) (SEE TEXT)
050
VPOS
09602- Figure 49. Basic Connections
BASIC CONNECTIONS
The internal 5 pF capacitance can be augmented by connecting Basic connections for operation of the ADL5511 are shown in a ground referenced capacitor to Pin 3 (FLT1). The value of the Figure 49. The ADL5511 requires a single supply of 5 V. The external capacitance is set using the following equation: supply is connected to the VPOS supply pin. Decouple this 1 C = − FLT1 5 pF (3) pin using two capacitors with values equal or similar to those 2 ( π × f × 3dB 000 , 10 Ω) shown in Figure 49. Place these capacitors as close as possible to the VPOS pin. For example, a 100 pF capacitance on FLT1 wil reduce the corner frequency to 150 kHz. As a general guideline, this An external 75 Ω resistor combines with the relatively high corner frequency should be set to be at least one tenth of the RF input impedance of the ADL5511 to provide a broadband minimum expected carrier frequency. This ensures a flat 50 Ω match. Place an ac coupling capacitor between this resistor frequency response around the frequency of interest. and RFIN. The envelope detection path of the ADL5511 includes internal The envelope output is available on Pin 10 (VENV) and is carrier-suppression low-pass filtering. With the FLT2 and FLT3 referenced to the 1.1 V dc voltage on Pin 9 (EREF). pins not connected, two internal 1 GHz and 800 MHz low-pass The rms output voltage is available at the VRMS pin with rms filters (operating in series) remove the RF carrier from the envelope averaging provided by the supply-referenced capacitance on output signal. Pin 14 (FLT4). The equations for these filters are as follows:
OPERATION BELOW 1 GHZ/ENVELOPE FILTERING
1 ≅1GHz (4) To operate the ADL5511 at frequencies below 1 GHz, a number 2 ( π × 4 . 0 pF × 400 Ω) of external capacitors must be added to the FLT3, FLT2, and and FLT1 pins. These changes are in addition to the choice of an appropriate rms averaging capacitor, see the Choosing a Value 1 ≅ 800 MHz (5) for the RMS Averaging Capacitor (CFLT4) section. (2π × 8 . 0 pF × 250 Ω) As part of the internal signal processing algorithm, the RF input Because the envelope detection circuitry includes a ful -wave signal passes through a low-pass filter comprising of a 10 kΩ rectifier, this filter has to primarily suppress the signal at twice resistor and a 5 pF capacitor (see Figure 49). This corresponds the original input frequency. to a corner frequency of approximately 3.2 MHz. If the carrier frequency is less than approximately ten times this value (32 MHz), this corner frequency must be reduced. Rev. C | Page 19 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION ENVELOPE PROPAGATION DELAY RMS CIRCUIT DESCRIPTION RMS FILTERING OUTPUT DRIVE CAPABILITY AND BUFFERING Viewing the Envelope on an Oscilloscope APPLICATIONS INFORMATION BASIC CONNECTIONS OPERATION BELOW 1 GHZ/ENVELOPE FILTERING CHOOSING A VALUE FOR THE RMS AVERAGING CAPACITOR (CFLT4) ENVELOPE TRACKING ACCURACY TIME DOMAIN ENVELOPE TRACKING ACCURACY VRMS AND VENV OUTPUT OFFSET DEVICE CALIBRATION AND ERROR CALCULATION ERROR VS. FREQUENCY EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE