Datasheet AD8318-EP (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 1 MHz TO 8 GHz, 70 dB Logarithmic Detector/Controller |
| 页数 / 页 | 12 / 10 — AD8318-EP. Enhanced Product. j0.5. 10k. RF OFF. j0.2. / Hz V n Y (. 0.2. … |
| 文件格式/大小 | PDF / 439 Kb |
| 文件语言 | 英语 |
AD8318-EP. Enhanced Product. j0.5. 10k. RF OFF. j0.2. / Hz V n Y (. 0.2. 0.5. –60dBm. 0.1GHz. 8GHz. –40dBm. –20dBm. 5.8GHz. 0.9GHz. –j0.2. C E 100. 1.9GHz
该数据表的模型线
文件文字版本
AD8318-EP Enhanced Product
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C Black; −55°C Blue; +105°C Red.
j1 j2 j0.5 10k RF OFF ) j0.2 / Hz V n Y ( 1k IT 0 0.2 0.5 1 2 S –60dBm 0.1GHz N 8GHz E –40dBm D –20dBm AL 5.8GHz R 0.9GHz T –j0.2 C E 100 P 1.9GHz S E IS –10dBm 3.6GHz 2.2GHz NO 0dBm –j0.5 –j2
15
10
-0
START FREQUENCY = 0.1GHz
83
1 3 10 30 100 300 1k 3k 10k
018
STOP FREQUENCY = 8GHz –j1
83- 107
FREQUENCY (kHz)
107 Figure 16. Input Impedance vs. Frequency; No Termination Resistor on Figure 19. Noise Spectral Density of Output; CLPF = Open INHI, ZO = 50 Ω
0.07 1k 0.06 ) z H V/ ) 0.05 n ( (A Y IT NT S 0.04 N DECREASING V E ENBL INCREASING VENBL D 100 L CURRE 0.03 A Y R L T P UP S 0.02 ISE SPEC O 0.01 N 0 10 1.4 1.5 1.6 1.7 1.8
019 -016
1 3 10 30 100 300 1k 3k 10k
83-
V
783
ENBL (V) FREQUENCY (kHz)
10 107 Figure 17. Supply Current vs. Enable Voltage Figure 20. Noise Spectral Density of Output Buffer (from CLPF to VOUT); CLPF = 0.1 μF
2.2 2.0 +25°C 2.0 –40°C 1.6 +85°C VOUT 1.8 1.2 1.6 0.8 200mV/VERTICAL DIVISION 1.4 0.4 ) B) d (V T 1.2 0 R ( OUV 1.0 –0.4 RRO E PULSED RF INPUT 0.1GHz, 0.8 –0.8 –10dBm GND 0.6 –1.2 0.4 –1.6 0.2 –2.0
17 0 0
–65 –55 –45 –35 –25 –15 –5 5 15
2 0 83- 3-
20ns PER HORIZONTAL DIVISION
78 107
PIN (dBm)
10 Figure 18. VOUT Pulse Response Time; Pulsed RF Input 0.1 GHz, –10 dBm; Figure 21. Output Voltage Stability vs. Supply Voltage at 1.9 GHz CLPF = Open When VP Varies by 10%, Multiple Devices Rev. 0 | Page 10 of 12 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Outline Dimensions Ordering Guide
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C Black; −55°C Blue; +105°C Red.
j1 j2 j0.5 10k RF OFF ) j0.2 / Hz V n Y ( 1k IT 0 0.2 0.5 1 2 S –60dBm 0.1GHz N 8GHz E –40dBm D –20dBm AL 5.8GHz R 0.9GHz T –j0.2 C E 100 P 1.9GHz S E IS –10dBm 3.6GHz 2.2GHz NO 0dBm –j0.5 –j2
15
10
-0
START FREQUENCY = 0.1GHz
83
1 3 10 30 100 300 1k 3k 10k
018
STOP FREQUENCY = 8GHz –j1
83- 107
FREQUENCY (kHz)
107 Figure 16. Input Impedance vs. Frequency; No Termination Resistor on Figure 19. Noise Spectral Density of Output; CLPF = Open INHI, ZO = 50 Ω
0.07 1k 0.06 ) z H V/ ) 0.05 n ( (A Y IT NT S 0.04 N DECREASING V E ENBL INCREASING VENBL D 100 L CURRE 0.03 A Y R L T P UP S 0.02 ISE SPEC O 0.01 N 0 10 1.4 1.5 1.6 1.7 1.8
019 -016
1 3 10 30 100 300 1k 3k 10k
83-
V
783
ENBL (V) FREQUENCY (kHz)
10 107 Figure 17. Supply Current vs. Enable Voltage Figure 20. Noise Spectral Density of Output Buffer (from CLPF to VOUT); CLPF = 0.1 μF
2.2 2.0 +25°C 2.0 –40°C 1.6 +85°C VOUT 1.8 1.2 1.6 0.8 200mV/VERTICAL DIVISION 1.4 0.4 ) B) d (V T 1.2 0 R ( OUV 1.0 –0.4 RRO E PULSED RF INPUT 0.1GHz, 0.8 –0.8 –10dBm GND 0.6 –1.2 0.4 –1.6 0.2 –2.0
17 0 0
–65 –55 –45 –35 –25 –15 –5 5 15
2 0 83- 3-
20ns PER HORIZONTAL DIVISION
78 107
PIN (dBm)
10 Figure 18. VOUT Pulse Response Time; Pulsed RF Input 0.1 GHz, –10 dBm; Figure 21. Output Voltage Stability vs. Supply Voltage at 1.9 GHz CLPF = Open When VP Varies by 10%, Multiple Devices Rev. 0 | Page 10 of 12 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Outline Dimensions Ordering Guide