Datasheet AD8310 (Analog Devices) - 7

制造商Analog Devices
描述Fast, Voltage-Out, DC to 440 MHz, 95 dB Logarithmic Amplifier
页数 / 页25 / 7 — AD8310. TYPICAL PERFORMANCE CHARACTERISTICS. 3.0. 2.5. –40°C. V 2.0. 2.0. …
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AD8310. TYPICAL PERFORMANCE CHARACTERISTICS. 3.0. 2.5. –40°C. V 2.0. 2.0. ( T. TPU 1.5. RROR (dB). SSI OU. 25°C. 1.0. A = –40°C. R 1.0. 85°C

AD8310 TYPICAL PERFORMANCE CHARACTERISTICS 3.0 2.5 –40°C V 2.0 2.0 ( T TPU 1.5 RROR (dB) SSI OU 25°C 1.0 A = –40°C R 1.0 85°C

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AD8310 TYPICAL PERFORMANCE CHARACTERISTICS 3.0 3.0 3 2.5 2.5 2 –40°C ) ) V 2.0 2.0 1 ( V T ( T TPU 1.5 TPU 1.5 0 RROR (dB) SSI OU E SSI OU 25°C R T 1.0 A = –40°C R 1.0 –40°C 85°C –1 25°C TA = +25°C 0.5 0.5 –2 TA = +85°C 85°C 0
01084-011
0 –3 –120 –100 –80 –60 –40 –20 0 20 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 10 20 (–87dBm) INPUT LEVEL (dBV) (+13dBm) P IN (dBm)
01084-043 Figure 3. RSSI Output vs. Input Level, 100 MHz Sine Input Figure 6. Log Linearity of RSSI Output vs. Input Level, at TA = −40°C, +25°C, and +85°C, Single-Ended Input 100 MHz Sine Input at TA = −40°C, +25°C, and +85°C
3.0 5 10MHz 50MHz 4 2.5 3 100MHz 2 ) 2.0 1 UT (V 10MHz 1.5 0 I OUTP RROR (dB) S E –1 RS 1.0 –2 50MHz –3 0.5 –4 100MHz 0 –5 –120 –100 –80 –60 –40 –20 0 20 –120 –100 –80 –60 –40 –20 0 20 (–87dBm) (+13dBm) (–87dBm) (+13dBm) INPUT LEVEL (dBV) INPUT LEVEL (dBV)
01084-015 01084-012 Figure 4. RSSI Output vs. Input Level at TA = 25°C Figure 7. Log Linearity of RSSI Output vs. Input Level at TA = 25°C for Frequencies of 10 MHz, 50 MHz, and 100 MHz for Frequencies of 10 MHz, 50 MHz, and 100 MHz
3.0 5 200MHz 300MHz 4 2.5 3 2 ) V 2.0 ( T 440MHz 1 200MHz TPU 1.5 0 RROR (dB) E –1 SSI OU R 1.0 –2 300MHz –3 0.5 440MHz –4 0 –5 –120 –100 –80 –60 –40 –20 0 20 –120 –100 –80 –60 –40 –20 0 20 (–87dBm) (–87dBm) (+13dBm) INPUT LEVEL (dBV) (+13dBm) INPUT LEVEL (dBV)
01084-013 01084-016 Figure 5. RSSI Output vs. Input Level at TA = 25°C Figure 8. Log Linearity of RSSI Output vs. Input Level at TA = 25°C for Frequencies of 200 MHz, 300 MHz, and 440 MHz for Frequencies of 200 MHz, 300 MHz, and 440 MHz Rev. F | Page 6 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PROGRESSIVE COMPRESSION SLOPE AND INTERCEPT CALIBRATION OFFSET CONTROL PRODUCT OVERVIEW ENABLE INTERFACE INPUT INTERFACE OFFSET INTERFACE OUTPUT INTERFACE USING THE AD8310 BASIC CONNECTIONS TRANSFER FUNCTION IN TERMS OF SLOPE AND INTERCEPT dBV vs. dBm INPUT MATCHING NARROW-BAND MATCHING GENERAL MATCHING PROCEDURE Step 1: Tune Out CIN Step 2: Calculate CO and LO Step 3: Split CO into Two Parts Step 4: Calculate LM SLOPE AND INTERCEPT ADJUSTMENTS INCREASING THE SLOPE TO A FIXED VALUE OUTPUT FILTERING LOWERING THE HIGH-PASS CORNER FREQUENCY OF THE OFFSET COMPENSATION LOOP APPLICATIONS INFORMATION CABLE-DRIVING DC-COUPLED INPUT EVALUATION BOARD DIE INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE