Datasheet AD640 (Analog Devices) - 9

AD640
50 µA/dB, or 1 mA per decade. This scaling parameter is
2.5 –55
8
C
trimmed to absolute accuracy using a 2 kHz square wave. At
+25
8
C 1
frequencies near the system bandwidth, the slope is reduced due
0 2.0 –1
to the reduced output of the limiter stages, but it is still rela-
+85
8
C –2 +125
8
C
tively insensitive to temperature variations so that a simple ex-
1.5
ternal slope adjustment in restore scaling accuracy. The intercept position bias generator (Figure 17) removes the
1.0 ABSOLUTE ERROR – dB
pedestal current from the summed detector outputs. It is ad- justed during manufacture such that the output (flowing into
0.5
Pin 14) is 1 mA when a 2 kHz square-wave input of exactly
OUTPUT CURRENT – mA
±10 mV is applied to the AD640. This places the dc intercept at
0
precisely 1 mV. The LOG COM output (Pin 13) is the comple- ment of LOG OUT. It also has a 1 mV intercept, but with an
–0.5
inverted slope of –1 mA/decade. Because its pedestal is very
1 10 100 1000 10000 INPUT VOLTAGE – mV
large (equivalent to about 100 dB), its intercept voltage is not Figure 19. Logarithmic Output and Absolute Error vs. DC guaranteed. The intercept positioning currents include a special or Square Wave Input at T internal temperature compensation (ITC) term which can be A = –55°C, +25°C, +85 °C and +125 °C, Input via On-Chip Attenuator disabled by connecting Pin 8 to ground. roughly a square waveform. The signal path may be extended The logarithmic function of the AD640 is absolutely calibrated using these outputs (see OPERATION OF CASCADED to within ± 0.3 dB (or ± 15 µA) for 2 kHz square-wave inputs of ± AD640s). The logarithmic outputs from two or more AD640s 1 mV to ± 100 mV, and to within ± 1 dB between ± 750 µV and ± can be directly summed with full accuracy. 200 mV. Figure 18 is a typical plot of the dc transfer function, showing the outputs at temperatures of –55°C, +25°C and A pair of 1 kΩ applications resistors, RG1 and RG2 (Figure 17) +125°C. While the slope and intercept are seen to be little af- are accessed via Pins 15, 16 and 17. These can be used to con- fected by temperature, there is a lateral shift in the endpoints of vert an output current to a voltage, with a slope of 1 V/decade the “linear” region of the transfer function, which reduces the (using one resistor), 2 V/decade (both resistors in series) or effective dynamic range. The cause of this shift is explained in 0.5 V/decade (both in parallel). Using all the resistors from two Fundamentals of Logarithmic Conversion section. AD640s (for example, in a cascaded configuration) ten slope options from 0.25 V to 4 V/decade are available.
2.5 +125
8
C +25
8
C 2 FUNDAMENTALS OF LOGARITHMIC CONVERSION 2.0 –55
8
C 1
The conversion of a signal to its equivalent logarithmic value
0
involves a nonlinear operation, the consequences of which can be
1.5 –1 –55
8
C
very confusing if not fully understood. It is important to realize
–2 +25
8
C
from the outset that many of the familiar concepts of linear
1.0 +125
8
C ABSOLUTE ERROR – dB
circuits are of little relevance in this context. For example, the incremental gain of an ideal logarithmic converter approaches
0.5
infinity as the input approaches zero. Further, an offset at the
OUTPUT CURRENT – mA
output of a linear amplifier is simply equivalent to an offset at
0
the input, while in a logarithmic converter it is equivalent to a change of amplitude at the input—a very different relationship.
–0.5 0.1 1.0 10.0 100.0 1000.0
We assume a dc signal in the following discussion to simplify the
INPUT VOLTAGE – mV
concepts; ac behavior and the effect of input waveform on cali- Figure 18. Logarithmic Output and Absolute Error vs. DC bration are discussed later. A logarithmic converter having a or Square Wave Input at TA = –55°C, +25 °C, Input Direct voltage input VIN and output VOUT must satisfy a transfer func- to Pins 1 and 20 tion of the form The on chip attenuator can be used to handle input levels 20 dB VOUT = VY LOG (VIN/VX) Equation (1) higher, that is, from ± 7.5 mV to ± 2 V for dc or square wave where Vy and Vx are fixed voltages which determine the scaling inputs. It is specially designed to have a positive temperature of the converter. The input is divided by a voltage because the coefficient and is trimmed to position the intercept at 10 mV dc argument of a logarithm has to be a simple ratio. The logarithm (or –24 dBm for a sinusoidal input) over the full temperature must be multiplied by a voltage to develop a voltage output. range. When using the attenuator the internal bias compensa- These operations are not, of course, carried out by explicit com- tion should be disabled by grounding Pin 8. Figure 19 shows putational elements, but are inherent in the behavior of the the output at –55°C, +25°C, +85°C and +125°C for a single converter. For stable operation, VX and VY must be based on AD640 with the attenuator in use; the curves overlap almost sound design criteria and rendered stable over wide temperature perfectly, and the lateral shift in the transfer function does not and supply voltage extremes. This aspect of RF logarithmic occur. Therefore, the full dynamic range is available at all amplifier design has traditionally received little attention. temperatures. When V The output of the final limiter is available in differential form at IN = VX, the logarithm is zero. VX is, therefore, called the Intercept Voltage, because a graph of V Pins 10 and 11. The output impedance is 75 Ω to ground from OUT versus LOG (VIN) —ideally a straight line—crosses the horizontal axis at this point either pin. For most input levels, this output will appear to have –8– REV. D Document Outline AD640-SPECIFICATIONS DC Specifications AC Specifications Thermal Characteristics ABSOLUTE MAXIMUM RATINGS TYPICAL DC PERFORMANCE CHARACTERISTICS TYPICAL AC PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE