Datasheet LTC6906 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Micropower, 10kHz to 1MHz Resistor Set Oscillator in SOT-23 |
| 页数 / 页 | 14 / 3 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 172 Kb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating
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LTC6906
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
RSET Frequency-Setting Resistor Range l 100 1000 kΩ Δf/ΔT Frequency Drift Over Temp (Note 3) RSET = 316k l ±0.005 %/°C Δf/ΔV Frequency Drift Over Supply (Note 3) V+ = 2.25V to 3.6V, 100k ≤ RSET ≤ 1000k 0.06 %/V Timing Jitter (Note 4) Pin 3 = V+, 100k ≤ RSET ≤ 1000k 0.03 % Pin 3 = Open, 100k ≤ RSET ≤ 1000k 0.07 % Pin 3 = 0V, 100k ≤ RSET ≤ 1000k 0.15 % Sf Long-Term Stability of Output Frequency Pin 3 = V+ 300 ppm/√kHr DC Duty Cycle l 45 50 55 % V+ Operating Supply Range (Note 8) l 2.25 3.6 V IS Power Supply Current RSET = 1000k, Pin 3 = 0V, RL = 10M V+ = 3.6V l 12.5 18 μA (DIV = 1, fOUT = 100kHz) V+ = 2.25V l 10.0 15 μA RSET = 100k, Pin 3 = 0V, RL = 10M V+ = 3.6V l 78 100 μA (DIV = 1, fOUT = 1MHz) V+ = 2.25V l 60 80 μA VIH High Level DIV Input Voltage V+ = 3.6V l 3.1 V V+ = 2.25V l 2.05 V VIL Low Level DIV Input Voltage V+ = 3.6V l 0.5 V V+ = 2.25V l 0.2 V IDIV DIV Input Current (Note 5) Pin 3 = V+ l 1 2 μA Pin 3 = 0V l –2 –1 μA VOH High Level Output Voltage (Note 5) V+ = 3.6V IOH = –100μA l 3.40 3.59 V IOH = –1mA l 2.80 3.30 V V+ = 2.25V IOH = –100μA l 2.15 2.2 V IOH = –1mA l 1.75 2.0 V VOL Low Level Output Voltage (Note 5) V+ = 3.6V IOL = 100μA l 0.02 0.2 V IOL = 1mA l 0.15 0.8 V V+ = 2.25V IOL = 100μA l 0.03 0.1 V IOL = 1mA l 0.30 0.5 V tr OUT Rise Time (Note 6) V+ = 3.6V 10 ns V+ = 2.25V 25 ns tf OUT Fall Time (Note 6) V+ = 3.6V 10 ns V+ = 2.25V 25 ns VGS GRD Pin Voltage Relative to SET Pin –10μA ≤ IGRD ≤ 0.3μA l –10 10 mV Voltage
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Output rise and fall times are measured between the 10% and may cause permanent damage to the device. Exposure to any Absolute 90% power supply levels. Maximum Rating condition for extended periods may affect device
Note 7:
The LTC6906C is guaranteed to meet specified performance from reliability and lifetime. 0°C to 70°C. The LTC6906C is designed, characterized and ex pected to
Note 2:
Some frequencies may be generated using two different values of meet specified performance from –40°C to 85°C but is not tested or QA RSET. For these frequencies, the error is specified assuming that the larger sampled at these temperatures. The LTC6906I is guaranteed to meet value of RSET is used. specified performance from –40°C to 85°C.
Note 3:
Frequency accuracy is defined as the deviation from the fOUT
Note 8:
Consult the Applications Information section for operation with equation. supplies higher than 3.6V.
Note 4:
Jitter is the ratio of the peak-to-peak deviation of the period to the
Note 9:
Test conditions reflect the master oscillator frequency. The output mean of the period. This specification is based on characterization and is divider is functionally tested and divided frequency accuracy is guaranteed not 100% tested. by design.
Note 5:
Current into a pin is given as a positive value. Current out of a pin is given as a negative value. 6906fc 3
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
RSET Frequency-Setting Resistor Range l 100 1000 kΩ Δf/ΔT Frequency Drift Over Temp (Note 3) RSET = 316k l ±0.005 %/°C Δf/ΔV Frequency Drift Over Supply (Note 3) V+ = 2.25V to 3.6V, 100k ≤ RSET ≤ 1000k 0.06 %/V Timing Jitter (Note 4) Pin 3 = V+, 100k ≤ RSET ≤ 1000k 0.03 % Pin 3 = Open, 100k ≤ RSET ≤ 1000k 0.07 % Pin 3 = 0V, 100k ≤ RSET ≤ 1000k 0.15 % Sf Long-Term Stability of Output Frequency Pin 3 = V+ 300 ppm/√kHr DC Duty Cycle l 45 50 55 % V+ Operating Supply Range (Note 8) l 2.25 3.6 V IS Power Supply Current RSET = 1000k, Pin 3 = 0V, RL = 10M V+ = 3.6V l 12.5 18 μA (DIV = 1, fOUT = 100kHz) V+ = 2.25V l 10.0 15 μA RSET = 100k, Pin 3 = 0V, RL = 10M V+ = 3.6V l 78 100 μA (DIV = 1, fOUT = 1MHz) V+ = 2.25V l 60 80 μA VIH High Level DIV Input Voltage V+ = 3.6V l 3.1 V V+ = 2.25V l 2.05 V VIL Low Level DIV Input Voltage V+ = 3.6V l 0.5 V V+ = 2.25V l 0.2 V IDIV DIV Input Current (Note 5) Pin 3 = V+ l 1 2 μA Pin 3 = 0V l –2 –1 μA VOH High Level Output Voltage (Note 5) V+ = 3.6V IOH = –100μA l 3.40 3.59 V IOH = –1mA l 2.80 3.30 V V+ = 2.25V IOH = –100μA l 2.15 2.2 V IOH = –1mA l 1.75 2.0 V VOL Low Level Output Voltage (Note 5) V+ = 3.6V IOL = 100μA l 0.02 0.2 V IOL = 1mA l 0.15 0.8 V V+ = 2.25V IOL = 100μA l 0.03 0.1 V IOL = 1mA l 0.30 0.5 V tr OUT Rise Time (Note 6) V+ = 3.6V 10 ns V+ = 2.25V 25 ns tf OUT Fall Time (Note 6) V+ = 3.6V 10 ns V+ = 2.25V 25 ns VGS GRD Pin Voltage Relative to SET Pin –10μA ≤ IGRD ≤ 0.3μA l –10 10 mV Voltage
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Output rise and fall times are measured between the 10% and may cause permanent damage to the device. Exposure to any Absolute 90% power supply levels. Maximum Rating condition for extended periods may affect device
Note 7:
The LTC6906C is guaranteed to meet specified performance from reliability and lifetime. 0°C to 70°C. The LTC6906C is designed, characterized and ex pected to
Note 2:
Some frequencies may be generated using two different values of meet specified performance from –40°C to 85°C but is not tested or QA RSET. For these frequencies, the error is specified assuming that the larger sampled at these temperatures. The LTC6906I is guaranteed to meet value of RSET is used. specified performance from –40°C to 85°C.
Note 3:
Frequency accuracy is defined as the deviation from the fOUT
Note 8:
Consult the Applications Information section for operation with equation. supplies higher than 3.6V.
Note 4:
Jitter is the ratio of the peak-to-peak deviation of the period to the
Note 9:
Test conditions reflect the master oscillator frequency. The output mean of the period. This specification is based on characterization and is divider is functionally tested and divided frequency accuracy is guaranteed not 100% tested. by design.
Note 5:
Current into a pin is given as a positive value. Current out of a pin is given as a negative value. 6906fc 3