Datasheet LTC2323-16 (Analog Devices)
| 制造商 | Analog Devices |
| 描述 | Dual, 16-Bit, 5Msps Differential Input ADC with Wide Input Common Mode Range |
| 页数 / 页 | 26 / 1 — FEATURES. DESCRIPTION. 5Msps Throughput Rate. ±4LSB INL (Typ). Guaranteed … |
| 文件格式/大小 | PDF / 1.3 Mb |
| 文件语言 | 英语 |
FEATURES. DESCRIPTION. 5Msps Throughput Rate. ±4LSB INL (Typ). Guaranteed 16-Bit, No Missing Codes
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LTC2323-16 Dual, 16-Bit, 5Msps Differential Input ADC with Wide Input Common Mode Range
FEATURES DESCRIPTION
n
5Msps Throughput Rate
The LTC®2323-16 is a low noise, high speed dual 16-bit n
±4LSB INL (Typ)
successive approximation register (SAR) ADC with n
Guaranteed 16-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input Common
Operating from a single 3.3V or 5V supply, the LTC2323-16
Mode Range
has an 8VP-P differential input range, making it ideal for n
81dB SNR (Typ) at fIN = 2MHz
applications which require a wide dynamic range with high n
–85dB THD (Typ) at fIN = 2MHz
common mode rejection. The LTC2323-16 achieves ±4LSB n Guaranteed Operation to 125°C INL typical, no missing codes at 16 bits and 81dB SNR. n Single 3.3V or 5V Supply The LTC2323-16 has an onboard low drift (20ppm/°C max) n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal 2.048V or 4.096V temperature-compensated reference. Reference The LTC2323-16 also has a high speed SPI-compatible n 1.8V to 2.5V I/O Voltages serial interface that supports CMOS or LVDS. The fast n CMOS or LVDS SPI-Compatible Serial I/O 5Msps per channel throughput with one-cycle latency n Power Dissipation 40mW/Ch (Typ) makes the LTC2323-16 ideally suited for a wide variety of n Small 28-Lead (4mm × 5mm) QFN Package high speed applications. The LTC2323-16 dissipates only 40mW per channel and offers nap and sleep modes to
APPLICATIONS
reduce the power consumption to 5μW for further power n High Speed Data Acquisition Systems savings during inactive periods. n Communications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog n Remote Data Acquisition Devices, Inc. All other trademarks are the property of their respective owners. n Imaging n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 32k Point FFT f DIFFERENTIAL INPUTS
3.3V OR 5V
S = 5Msps, fIN = 2.2MHz NO CONFIGURATION REQUIRED
0
IN+, IN–
10µF SNR = 81.4dB THD = –86.8dB –20 ARBITRARY DIFFERENTIAL SINAD = 80.3dB V REFOUT1 25Ω DD 10µF SFDR = 88.2dB AIN1+ –40 VBYP1 1µF
LTC2323-16
0V 0V –60 220pF REFOUT2 10µF VBYP2 –80 BIPOLAR UNIPOLAR 1µF 25Ω AMPLITUDE (dBFS) –100 A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC AIN2– CLKOUT (FPGA, CPLD, –120 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV GND OGND OV –140 DD 1.8V TO 2.5V 0 0.5 1 1.5 2 2.5 1µF FREQUENCY (MHz) 232316 TA01a 232316 TA01b 232316fc For more information www.linear.com/LTC2323-16 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts
FEATURES DESCRIPTION
n
5Msps Throughput Rate
The LTC®2323-16 is a low noise, high speed dual 16-bit n
±4LSB INL (Typ)
successive approximation register (SAR) ADC with n
Guaranteed 16-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input Common
Operating from a single 3.3V or 5V supply, the LTC2323-16
Mode Range
has an 8VP-P differential input range, making it ideal for n
81dB SNR (Typ) at fIN = 2MHz
applications which require a wide dynamic range with high n
–85dB THD (Typ) at fIN = 2MHz
common mode rejection. The LTC2323-16 achieves ±4LSB n Guaranteed Operation to 125°C INL typical, no missing codes at 16 bits and 81dB SNR. n Single 3.3V or 5V Supply The LTC2323-16 has an onboard low drift (20ppm/°C max) n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal 2.048V or 4.096V temperature-compensated reference. Reference The LTC2323-16 also has a high speed SPI-compatible n 1.8V to 2.5V I/O Voltages serial interface that supports CMOS or LVDS. The fast n CMOS or LVDS SPI-Compatible Serial I/O 5Msps per channel throughput with one-cycle latency n Power Dissipation 40mW/Ch (Typ) makes the LTC2323-16 ideally suited for a wide variety of n Small 28-Lead (4mm × 5mm) QFN Package high speed applications. The LTC2323-16 dissipates only 40mW per channel and offers nap and sleep modes to
APPLICATIONS
reduce the power consumption to 5μW for further power n High Speed Data Acquisition Systems savings during inactive periods. n Communications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog n Remote Data Acquisition Devices, Inc. All other trademarks are the property of their respective owners. n Imaging n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 32k Point FFT f DIFFERENTIAL INPUTS
3.3V OR 5V
S = 5Msps, fIN = 2.2MHz NO CONFIGURATION REQUIRED
0
IN+, IN–
10µF SNR = 81.4dB THD = –86.8dB –20 ARBITRARY DIFFERENTIAL SINAD = 80.3dB V REFOUT1 25Ω DD 10µF SFDR = 88.2dB AIN1+ –40 VBYP1 1µF
LTC2323-16
0V 0V –60 220pF REFOUT2 10µF VBYP2 –80 BIPOLAR UNIPOLAR 1µF 25Ω AMPLITUDE (dBFS) –100 A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC AIN2– CLKOUT (FPGA, CPLD, –120 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV GND OGND OV –140 DD 1.8V TO 2.5V 0 0.5 1 1.5 2 2.5 1µF FREQUENCY (MHz) 232316 TA01a 232316 TA01b 232316fc For more information www.linear.com/LTC2323-16 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts