Datasheet MCP6031, MCP6032, MCP6035, MCP6034 (Microchip) - 2
| 制造商 | Microchip |
| 描述 | The MCP6031 operational amplifier (op amp) has a gain bandwidth of 10 kHz with a low typical operating current of 900 nA and an offset voltage that is less than 150 uV |
| 页数 / 页 | 34 / 2 — MCP6031/2/3/4. 1.0. ELECTRICAL. † Notice:. CHARACTERISTICS. Absolute … |
| 文件格式/大小 | PDF / 652 Kb |
| 文件语言 | 英语 |
MCP6031/2/3/4. 1.0. ELECTRICAL. † Notice:. CHARACTERISTICS. Absolute Maximum Ratings †. 4.1.2 “Input Voltage And Current Limits”
该数据表的模型线
- MCP6031-E/MC MCP6031-E/MS MCP6031-E/P MCP6031-E/SN MCP6031T-E/MC MCP6031T-E/MS MCP6031T-E/OT MCP6031T-E/OTVAO MCP6031T-E/SN
文件文字版本
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MCP6031/2/3/4 1.0 ELECTRICAL † Notice:
Stresses above those listed under “Absolute
CHARACTERISTICS
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional
Absolute Maximum Ratings †
operation of the device at those or any other conditions above those indicated in the operational listings of this V specification is not implied. Exposure to maximum rat- DD – VSS ..7.0V Current at Input Pins ...±2 mA ing conditions for extended periods may affect device reliability. Analog Inputs (VIN+, VIN-)†† .. VSS – 1.0V to VDD + 1.0V All Other Inputs and Outputs ... V
††
See
4.1.2 “Input Voltage And Current Limits”
SS – 0.3V to VDD + 0.3V Difference Input Voltage .. |VDD – VSS| Output Short-Circuit Current ...continuous Current at Output and Supply Pins ..±30 mA Storage Temperature...-65°C to +150°C Maximum Junction Temperature (TJ) ..+150°C ESD protection on all pins (HBM; MM) .. ≥ 4 kV; 400V
DC ELECTRICAL SPECIFICATIONS Electrical Characteristics
: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS=GND, TA= +25°C, VCM = VDD/2, V ≈ OUT VDD/2, VL = VDD/2, RL = 1 MΩ to VL and CS is tied low. (Refer to Figure 1-2 and Figure 1-3).
Parameters Sym Min Typ Max Units Conditions Input Offset
Input Offset Voltage VOS -150 — +150 µV VDD = 3.0V, VCM = VDD/3 Input Offset Drift with Temperature ΔVOS/ΔTA — ±3.0 — µV/°C TA= -40°C to +125°C, VDD = 3.0V, VCM = VDD/3 Power Supply Rejection Ratio PSRR 70 88 — dB VCM = VSS
Input Bias Current and Impedance
Input Bias Current IB — ±1.0 100 pA IB — 60 — pA TA = +85°C IB — 2000 5000 pA TA = +125°C Input Offset Current IOS — ±1.0 — pA Common Mode Input Impedance ZCM — 1013||6 — Ω||pF Differential Input Impedance ZDIFF — 1013||6 — Ω||pF
Common Mode
Common Mode Input Voltage V − CMR VSS 0.3 — VDD + 0.3 V Range Common Mode Rejection Ratio CMRR 70 95 — dB VCM = -0.3V to 2.1V, VDD = 1.8V 72 93 — dB VCM = -0.3V to 5.8V, VDD = 5.5V 70 89 — dB VCM = 2.75V to 5.8V, VDD = 5.5V 72 93 — dB VCM = -0.3V to 2.75V, VDD = 5.5V
Open-Loop Gain
DC Open-Loop Gain AOL 95 115 — dB 0.2V < VOUT < (VDD – 0.2V) (Large Signal) RL = 50 kΩ to VL DS22041B-page 2 © 2008 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics FIGURE 1-1: Timing Diagram for the CS Pin on the MCP6033. 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage with VDD = 3.0V. FIGURE 2-2: Input Offset Voltage Drift with VDD = 3.0V and TA £ +85˚C. FIGURE 2-3: Input Offset Voltage Drift with VDD = 3.0V and TA ³ +85˚C. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Frequency. FIGURE 2-10: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage with VCM = VDD. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage with VCM = VSS. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency ( MCP6032/4 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-23: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-24: Output Voltage Swing vs. Frequency. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6031/2/3/4 family shows no phase reversal . FIGURE 2-33: Chip Select (CS) to Amplifier Output Response Time (MCP6033 only). FIGURE 2-34: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 5.5V. FIGURE 2-35: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 3.0V. FIGURE 2-36: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 1.8V. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Chip Select Digital Input 3.4 Power Supply Pins 4.0 Application Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Output Loads and Battery Life 4.4 Capacitive Loads FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads. FIGURE 4-4: Recommended RISO values for Capacitive Loads. 4.5 MCP6033 Chip Select 4.6 Supply Bypass 4.7 Unused Op Amps FIGURE 4-5: Unused Op Amps. 4.8 PCB Surface Leakage FIGURE 4-6: Example Guard Ring Layout for Inverting Gain. 4.9 Application Circuits FIGURE 4-7: High Side Battery Current Sensor. FIGURE 4-8: Precision, Non-inverting Comparator. FIGURE 4-9: Driving the MCP3421 using an R-C Snubber. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 MAPS (Microchip Advanced Part Selector) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information
MCP6031/2/3/4 1.0 ELECTRICAL † Notice:
Stresses above those listed under “Absolute
CHARACTERISTICS
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional
Absolute Maximum Ratings †
operation of the device at those or any other conditions above those indicated in the operational listings of this V specification is not implied. Exposure to maximum rat- DD – VSS ..7.0V Current at Input Pins ...±2 mA ing conditions for extended periods may affect device reliability. Analog Inputs (VIN+, VIN-)†† .. VSS – 1.0V to VDD + 1.0V All Other Inputs and Outputs ... V
††
See
4.1.2 “Input Voltage And Current Limits”
SS – 0.3V to VDD + 0.3V Difference Input Voltage .. |VDD – VSS| Output Short-Circuit Current ...continuous Current at Output and Supply Pins ..±30 mA Storage Temperature...-65°C to +150°C Maximum Junction Temperature (TJ) ..+150°C ESD protection on all pins (HBM; MM) .. ≥ 4 kV; 400V
DC ELECTRICAL SPECIFICATIONS Electrical Characteristics
: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS=GND, TA= +25°C, VCM = VDD/2, V ≈ OUT VDD/2, VL = VDD/2, RL = 1 MΩ to VL and CS is tied low. (Refer to Figure 1-2 and Figure 1-3).
Parameters Sym Min Typ Max Units Conditions Input Offset
Input Offset Voltage VOS -150 — +150 µV VDD = 3.0V, VCM = VDD/3 Input Offset Drift with Temperature ΔVOS/ΔTA — ±3.0 — µV/°C TA= -40°C to +125°C, VDD = 3.0V, VCM = VDD/3 Power Supply Rejection Ratio PSRR 70 88 — dB VCM = VSS
Input Bias Current and Impedance
Input Bias Current IB — ±1.0 100 pA IB — 60 — pA TA = +85°C IB — 2000 5000 pA TA = +125°C Input Offset Current IOS — ±1.0 — pA Common Mode Input Impedance ZCM — 1013||6 — Ω||pF Differential Input Impedance ZDIFF — 1013||6 — Ω||pF
Common Mode
Common Mode Input Voltage V − CMR VSS 0.3 — VDD + 0.3 V Range Common Mode Rejection Ratio CMRR 70 95 — dB VCM = -0.3V to 2.1V, VDD = 1.8V 72 93 — dB VCM = -0.3V to 5.8V, VDD = 5.5V 70 89 — dB VCM = 2.75V to 5.8V, VDD = 5.5V 72 93 — dB VCM = -0.3V to 2.75V, VDD = 5.5V
Open-Loop Gain
DC Open-Loop Gain AOL 95 115 — dB 0.2V < VOUT < (VDD – 0.2V) (Large Signal) RL = 50 kΩ to VL DS22041B-page 2 © 2008 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics FIGURE 1-1: Timing Diagram for the CS Pin on the MCP6033. 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage with VDD = 3.0V. FIGURE 2-2: Input Offset Voltage Drift with VDD = 3.0V and TA £ +85˚C. FIGURE 2-3: Input Offset Voltage Drift with VDD = 3.0V and TA ³ +85˚C. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Frequency. FIGURE 2-10: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage with VCM = VDD. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage with VCM = VSS. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency ( MCP6032/4 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-23: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-24: Output Voltage Swing vs. Frequency. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6031/2/3/4 family shows no phase reversal . FIGURE 2-33: Chip Select (CS) to Amplifier Output Response Time (MCP6033 only). FIGURE 2-34: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 5.5V. FIGURE 2-35: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 3.0V. FIGURE 2-36: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 1.8V. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Chip Select Digital Input 3.4 Power Supply Pins 4.0 Application Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Output Loads and Battery Life 4.4 Capacitive Loads FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads. FIGURE 4-4: Recommended RISO values for Capacitive Loads. 4.5 MCP6033 Chip Select 4.6 Supply Bypass 4.7 Unused Op Amps FIGURE 4-5: Unused Op Amps. 4.8 PCB Surface Leakage FIGURE 4-6: Example Guard Ring Layout for Inverting Gain. 4.9 Application Circuits FIGURE 4-7: High Side Battery Current Sensor. FIGURE 4-8: Precision, Non-inverting Comparator. FIGURE 4-9: Driving the MCP3421 using an R-C Snubber. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 MAPS (Microchip Advanced Part Selector) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information