Datasheet MCP606, MCP607, MCP608 (Microchip) - 7

MCP606/7/8/9 2.0 TYPICAL PERFORMANCE CURVES Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, V ≈ DD = +2.5V to +5.5V, VSS = GND, TA = +25°C, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 kΩ to VL, CL = 60 pF, and CS is tied low.
) 16% 16% 206 Samples 14% 1200 Samples 14% V V DD = 5.5V 12% DD = 5.5V 12% 10% 10% Occurances ( 8% Occurances 8% 6% 6% 4% 4% 2% rcentage of e 0% 2% P Percentage of 0 0 50 0% -250 -200 -150 -100 -5 100 150 200 250 -8 -6 -4 -2 0 2 4 6 8 Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-1:
Input Offset Voltage at
FIGURE 2-4:
Input Offset Voltage Drift VDD = 5.5V. Magnitude at VDD = 5.5V.
) 16% 18% 1200 Samples 206 Samples 14% 16% V V DD = 2.5V DD = 2.5V 12% 14% 10% 12% 8% 10% Occurances 6% 8% age of Occurances ( 4% 6% 2% 4% rcentage of 0% Percent e 2% 0 0 0 0 0 0 P 50 00 50 00 -5 50 0% -2 -2 -1 -1 10 15 20 25 -8 -6 -4 -2 0 2 4 6 8 Input Offset Voltage (µV) Input Offset Voltage Drift (µV/°C) FIGURE 2-2:
Input Offset Voltage at
FIGURE 2-5:
Input Offset Voltage Drift VDD = 2.5V. Magnitude at VDD = 2.5V.
22 24 20 18 22 nt 16 V 14 20 r (µA) DD = 5.5V t Curre 12 18 en 10 TA = +85°C c ent Current 8 TA = +25°C sc r Amplifier (µA) 16 6 TA = -40°C r Amplifie VDD = 2.5V Quies pe 4 Quie pe 14 2 0 12 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 Power Supply Voltage (V) Ambient Temperature (°C) FIGURE 2-3:
Quiescent Current vs.
FIGURE 2-6:
Quiescent Current vs. Power Supply Voltage. Ambient Temperature. © 2009 Microchip Technology Inc. DS11177F-page 7 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: Timing Diagram for the CS Pin on the MCP608. 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage at VDD = 5.5V. FIGURE 2-2: Input Offset Voltage at VDD = 2.5V. FIGURE 2-3: Quiescent Current vs. Power Supply Voltage. FIGURE 2-4: Input Offset Voltage Drift Magnitude at VDD = 5.5V. FIGURE 2-5: Input Offset Voltage Drift Magnitude at VDD = 2.5V. FIGURE 2-6: Quiescent Current vs. Ambient Temperature. FIGURE 2-7: Input Offset Voltage vs. Ambient Temperature. FIGURE 2-8: Open-Loop Gain and Phase vs. Frequency. FIGURE 2-9: Channel-to-Channel Separation (MCP607 and MCP609 only). FIGURE 2-10: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-11: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-12: Input Noise Voltage Density vs. Frequency. FIGURE 2-13: Input Bias Current, Input Offset Current vs. Ambient Temperature. FIGURE 2-14: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-15: CMRR, PSRR vs. Frequency. FIGURE 2-16: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-19: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-20: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-21: Slew Rate vs. Ambient Temperature. FIGURE 2-22: Output Voltage Headroom vs. Ambient Temperature at RL = 5 kW. FIGURE 2-23: The MCP606/7/8/9 Show No Phase Reversal. FIGURE 2-24: Output Short Circuit Current Magnitude vs. Ambient Temperature. FIGURE 2-25: Large-signal, Non-inverting Pulse Response. FIGURE 2-26: Small-signal, Non-inverting Pulse Response. FIGURE 2-27: Chip Select (CS) Hysteresis (MCP608 only). FIGURE 2-28: Large-signal, Inverting Pulse Response. FIGURE 2-29: Small-signal, Inverting Pulse Response. FIGURE 2-30: Amplifier Output Response Times vs. Chip Select (CS) Pulse (MCP608 only). FIGURE 2-31: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Chip Select Digital Input 3.4 Power Supply Pins 4.0 Applications Information 4.1 Rail-to-Rail Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity Gain Buffer has a Limited VOUT Range. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO stabilizes large capacitive loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 MCP608 Chip Select 4.5 Supply Bypass 4.6 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.7 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.8 Application Circuits FIGURE 4-8: Low Side Battery Current Sensor. FIGURE 4-9: Photodiode (in Photo-voltaic mode) and Transimpedance Amplifier. FIGURE 4-10: Photodiode (in Photo- conductive mode) and Transimpedance Amplifier. FIGURE 4-11: Two Op Amp Instrumentation Amplifier. FIGURE 4-12: Three Op Amp Instrumentation Amplifier. FIGURE 4-13: Precision Gain with Good Load Isolation. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information