Datasheet MCP6051, MCP6052, MCP6054 (Microchip)

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MCP6051/2/4 30 µA, High Precision Op Amps Features Description
• Low Offset Voltage: ±150 µV (maximum) The Microchip Technology Inc. MCP6051/2/4 family of • Low Quiescent Current: 30 µA (typical) operational amplifiers (op amps) has low input offset • Rail-to-Rail Input and Output voltage (±150 µV, maximum) and rail-to-rail input and output operation. This family is unity gain stable and • Wide Supply Voltage Range: 1.8V to 6.0V has a gain bandwidth product of 385 kHz (typical). • Gain Bandwidth Product: 385 kHz (typical) These devices operate with a single supply voltage as • Unity Gain Stable low as 1.8V, while drawing low quiescent current per • Extended Temperature Range: -40°C to +125°C amplifier (30 µA, typical). These features make the • No Phase Reversal family of op amps well suited for single-supply, high precision, battery-powered applications.
Applications
The MCP6051/2/4 family is offered in single (MCP6051), dual (MCP6052), and quad (MCP6054) • Automotive configurations. • Portable Instrumentation The MCP6051/2/4 is designed with Microchip’s • Sensor Conditioning advanced CMOS process. All devices are available in • Battery Powered Systems the extended temperature range, with a power supply • Medical Instrumentation range of 1.8V to 6.0V. • Test Equipment
Package Types
• Analog Filters
MCP6051 MCP6052 Design Aids SOIC SOIC
NC 1 8 NC V • SPICE Macro Models V 1 8 OUTA DD • FilterLab® Software V 2 7 VDD V 2 7 V IN– INA– OUTB • Microchip Advanced Part Selector (MAPS) V 3 6 V V IN+ OUT INA+ 3 6 VINB– V 4 5 NC V • Analog Demonstration and Evaluation Boards V SS SS 4 5 INB+ • Application Notes
MCP6051 MCP6052 2x3 TDFN * 2x3 TDFN * Typical Application
NC 1 8 NC V 1 8 OUTA VDD VIN– 2 EP 7 VDD VINA– 2 EP 7 VOUTB R 9 V 9 V L IN+ 3 6 VOUT INA+ 3 6 VINB– V 4 5 NC V 4 5 V V SS SS INB+ Z OUT IN
MCP6051 MCP6051 MCP6054 SOT-23-5 SOIC, TSSOP
C V 1 14 V VOUT 1 5 V OUTA OUTD DD V V 2 13 VIND– 2 Z = R + jωL R SS INA– IN L V 3 12 V V IND+
Gyrator
3 4 INA+ IN+ VIN– L = R RC L V V DD 4 11 SS VINB+ 5 10 VINC+ VINB– 6 9 VINC– VOUTB 7 8 VOUTC * Includes Exposed Thermal Pad (EP); see Table 3-1. © 2010 Microchip Technology Inc. DS22182B-page 1 Document Outline MCP6051/2/4 Applications Design Aids Typical Application Description Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC electrical specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: temperature specifications 1.3 Test Circuits EQUATION 1-1: FIGURE 1-1: AC and DC Test Circuit for Most Specifications. Notes: 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage with VDD = 3.0V. FIGURE 2-2: Input Offset Voltage Drift with VDD = 3.0V and TA £ +85°C. FIGURE 2-3: Input Offset Voltage Drift with VDD = 3.0V and TA ³ +85°C. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 3.0V. FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. FIGURE 2-7: Input Offset Voltage vs. Output Voltage. FIGURE 2-8: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-9: Input Noise Voltage Density vs. Frequency. FIGURE 2-10: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-11: CMRR, PSRR vs. Frequency. FIGURE 2-12: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-13: Common Mode Input Voltage Range Limit vs. Ambient Temperature. FIGURE 2-14: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-15: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs Ambient Temperature with VCM = 0.9VDD. FIGURE 2-17: Quiescent Current vs. Power Supply Voltage with VCM = 0.9VDD. FIGURE 2-18: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-19: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-20: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-21: Channel-to-Channel Separation vs. Frequency (MCP6052/4 only). FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage. FIGURE 2-23: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-24: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-25: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-26: Output Voltage Swing vs. Frequency. FIGURE 2-27: Ratio of Output Voltage Headroom to Output Current vs. Output Current. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Slew Rate vs. Ambient Temperature. FIGURE 2-30: Small Signal Non-Inverting Pulse Response. FIGURE 2-31: Small Signal Inverting Pulse Response. FIGURE 2-32: Large Signal Non-Inverting Pulse Response. FIGURE 2-33: Large Signal Inverting Pulse Response. FIGURE 2-34: The MCP6051/2/4 Shows No Phase Reversal. FIGURE 2-35: Closed Loop Output Impedance vs. Frequency. FIGURE 2-36: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) Notes: 4.0 Application Information 4.1 Rail-to-Rail Input 4.1.1 Phase Reversal 4.1.2 Input Voltage Limits FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.1.3 Input Current Limits FIGURE 4-3: Protecting the Analog Inputs. 4.1.4 Normal Operation 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 1. Non-inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the common mode input voltage. 2. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface. 4.7 Application Circuits 4.7.1 Gyrator FIGURE 4-8: Gyrator. 4.7.2 Instrumentation Amplifier FIGURE 4-9: Two Op Amp Instrumentation Amplifier. 4.7.3 Precision Comparator FIGURE 4-10: Precision, Non-inverting Comparator. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes Notes: 6.0 Packaging Information Features 6.1 Package Marking Information 30 µA, High Precision Op Amps Appendix A: Revision History Revision B (December 2010) 1. Added new SOT-23-5 package type for MCP6051 device. 2. Corrected Figures 2-13, 2-22, 2-23, 2-24 and 2-28 in Section 2.0 “Typical Performance Curves”. 3. Modified Table 3-1 to show the pin column for MCP6051, SOT-23-5 package. 4. Updated Section 4.1.2 “Input Voltage Limits”. 5. Added Section 4.1.3 “Input Current Limits”. 6. Added new document item in Section 5.5 “Application Notes”. 7. Updated the package markings information and drawings. 8. Updated the Product Identification System page. Revision A (May 2009) Notes: a) MCP6051T-E/OT: Tape and Reel, 5LD SOT-23 package b) MCP6051-E/SN: 8LD SOIC package c) MCP6051T-E/SN: Tape and Reel, 8LD SOIC package d) MCP6051T-E/MNY: Tape and Reel, 8LD 2x3 TDFN package a) MCP6052-E/SN: 8LD SOIC package b) MCP6052T-E/SN: Tape and Reel, 8LD SOIC package c) MCP6052T-E/MNY: Tape and Reel 8LD 2x3 TDFN package a) MCP6054-E/SL: 14LD SOIC package b) MCP6054T-E/SL: Tape and Reel, 14LD SOIC package c) MCP6054-E/ST: 14LD TSSOP package d) MCP6054T-E/ST: Tape and Reel, 14LD TSSOP package Notes: Worldwide Sales and Service Trademarks Worldwide Sales