Datasheet MCP4706, MCP4716, MCP4726 (Microchip) - 10

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MCP4706/4716/4726 TABLE 1-3: I2C BUS DATA REQUIREMENTS (SLAVE MODE) (CONTINUED) I2C™ AC Characteristics Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ TA ≤ +125°C (Extended) Operating Voltage VDD range is described in
Electrical Characteristics Param. Sym Characteristic Min Max Units Conditions No.
102A
(5 )
TRSCL SCL rise time 100 kHz mode — 1000 ns Cb is specified to be from 10 to 400 pF (100 pF 400 kHz mode 20 + 0.1Cb 300 ns maximum for 3.4 MHz 1.7 MHz mode 20 80 ns mode) 1.7 MHz mode 20 160 ns After a Repeated Start condition or an Acknowledge bit 3.4 MHz mode 10 40 ns 3.4 MHz mode 10 80 ns After a Repeated Start condition or an Acknowledge bit 102B
(5 )
TRSDA SDA rise time 100 kHz mode — 1000 ns Cb is specified to be from 10 to 400 pF (100 pF max 400 kHz mode 20 + 0.1Cb 300 ns for 3.4 MHz mode) 1.7 MHz mode 20 160 ns 3.4 MHz mode 10 80 ns 103A
(5 )
TFSCL SCL fall time 100 kHz mode — 300 ns Cb is specified to be from 10 to 400 pF (100 pF max 400 kHz mode 20 + 0.1Cb 300 ns for 3.4 MHz mode) 1.7 MHz mode 20 80 ns 3.4 MHz mode 10 40 ns 103B
(5 )
TFSDA SDA fall time 100 kHz mode — 300 ns Cb is specified to be from 10 to 400 pF (100 pF max 400 kHz mode 20 + 0.1Cb
(4)
300 ns for 3.4 MHz mode) 1.7 MHz mode 20 160 ns 3.4 MHz mode 10 80 ns
Note 1:
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
2:
A Fast mode (400 kHz) I2C™ bus device can be used in a Standard mode (100 kHz) I2C bus system, but the requirement t ≥ SU;DAT 250 ns must then be met. This will automatically be the case if the device does not stretch the Low period of the SCL signal. If such a device does stretch the Low period of the SCL signal, it must output the next data bit to the SDA line. TR max.+tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard mode I2C bus specification) before the SCL line is released.
3:
The MCP47X6 device must provide a data hold time to bridge the undefined part between VIH and VIL of the falling edge of the SCL signal. This specification is not a part of the I2C specification, but must be tested in order to ensure that the output data will meet the setup and hold specifications for the receiving device.
4:
Use Cb in pF for the calculations.
5:
Not Tested. This parameter ensured by characterization.
6:
A Master Transmitter must provide a delay to ensure that difference between SDA and SCL fall times do not unintentionally create a Start or Stop condition. If this parameter is too short, it can create an unintentional Start or Stop condition to other devices on the I2C bus line. If this parameter is too long, the Data Input Setup (TSU:DAT) or Clock Low time (TLOW) can be affected.
Data Input:
This parameter must be longer than tSP.
Data Output:
This parameter is characterized, and tested indirectly by testing TAA parameter.
7:
Ensured by the TAA 3.4 MHz specification test. 2
8:
The specification is not part of the I C specification. TAA = THD:DAT + TFSDA (or TRSDA). DS22272C-page 10 © 2011-2012 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 I2C Mode Timing Waveforms and Requirements FIGURE 1-1: Power-On and Brown-Out Reset Waveforms. FIGURE 1-2: I2C Power-Down Command Timing. TABLE 1-1: RESET Timing FIGURE 1-3: I2C Bus Start/Stop Bits Timing Waveforms. TABLE 1-2: I2C Bus Start/Stop Bits Requirements FIGURE 1-4: I2C Bus Data Timing. TABLE 1-3: I2C Bus Data Requirements (Slave Mode) 2.0 Typical Performance Curves FIGURE 2-1: INL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 00. FIGURE 2-2: INL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 00. FIGURE 2-3: INL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 00. FIGURE 2-4: INL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 00. FIGURE 2-5: INL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 00. FIGURE 2-6: INL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 00. FIGURE 2-7: DNL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 00. FIGURE 2-8: DNL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 00. FIGURE 2-9: DNL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 00. FIGURE 2-10: DNL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 00. FIGURE 2-11: DNL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 00. FIGURE 2-12: DNL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 00. FIGURE 2-13: Zero-Scale Error (ZSE) vs. VDD and Temperature (MCP4726). VREF1:VREF0 = 00. FIGURE 2-14: Zero-Scale Error (ZSE) vs. VDD and Temperature (MCP4716). VREF1:VREF0 = 00. FIGURE 2-15: Zero-Scale Error (ZSE) vs. VDD and Temperature (MCP4706). VREF1:VREF0 = 00. FIGURE 2-16: Full-Scale Error (FSE) vs. VDD and Temperature (MCP4726). VREF1:VREF0 = 00. FIGURE 2-17: Full-Scale Error (FSE) vs. VDD and Temperature (MCP4716). VREF1:VREF0 = 00. FIGURE 2-18: Full-Scale Error (FSE) vs. VDD and Temperature (MCP4706). VREF1:VREF0 = 00. FIGURE 2-19: INL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-20: INL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-21: INL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-22: INL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-23: INL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-24: INL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-25: DNL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-26: DNL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-27: DNL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-28: DNL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-29: DNL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-30: DNL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-31: Zero-Scale Error (ZSE) vs. Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-32: Zero-Scale Error (ZSE) vs. Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-33: Zero-Scale Error (ZSE) vs. Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-34: Full-Scale Error (FSE) vs. Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-35: Full-Scale Error (FSE) vs. Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-36: Full-Scale Error (FSE) vs. Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-37: INL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-38: INL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-39: INL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-40: INL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-41: INL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-42: INL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-43: DNL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-44: DNL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-45: DNL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-46: DNL vs. Code (code = 100 to 4000) and Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-47: DNL vs. Code (code = 25 to 1000) and Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-48: DNL vs. Code (code = 6 to 250) and Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-49: Zero-Scale Error (ZSE) vs. Temperature (MCP4726). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-50: Zero-Scale Error (ZSE) vs. Temperature (MCP4716). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-51: Zero-Scale Error (ZSE) vs. Temperature (MCP4706). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-52: Full-Scale Error (FSE) vs. Temperature (MCP4726). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-53: Full-Scale Error (FSE) vs. Temperature (MCP4716). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-54: Full-Scale Error (FSE) vs. Temperature (MCP4706). VDD = 2.7V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-55: INL vs. Code (code = 100 to 4000) and VDD (2.7V, 5V, 5.5V) (MCP4726). VREF1:VREF0 = 10, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-56: INL vs. Code (code = 25 to 1000) and VDD (2.7V, 5V, 5.5V) (MCP4716). VREF1:VREF0 = 10, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-57: INL vs. Code (code = 6 to 250) and VDD (2.7V, 5V, 5.5V) (MCP4706). VREF1:VREF0 = 10, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-58: DNL vs. Code (code = 100 to 4000) and VDD (2.7V, 5V, 5.5V) (MCP4726). VREF1:VREF0 = 10, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-59: DNL vs. Code (code = 25 to 1000) and VDD (2.7V, 5V, 5.5V) (MCP4716). VREF1:VREF0 = 10, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-60: DNL vs. Code (code = 6 to 250) and VDD (2.7V, 5V, 5.5V) (MCP4706). VREF1:VREF0 = 10, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-61: INL vs. Code (code = 100 to 4000) and VDD (2.7V, 5V, 5.5V) (MCP4726). VREF1:VREF0 = 11, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-62: INL vs. Code (code = 25 to 1000) and VDD (2.7V, 5V, 5.5V) (MCP4716). VREF1:VREF0 = 11, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-63: INL vs. Code (code = 6 to 250) and VDD (2.7V, 5V, 5.5V) (MCP4706). VREF1:VREF0 = 11, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-64: DNL vs. Code (code = 100 to 4000) and VDD (2.7V, 5V, 5.5V) (MCP4726). VREF1:VREF0 = 11, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-65: DNL vs. Code (code = 25 to 1000) and VDD (2.7V, 5V, 5.5V) (MCP4716). VREF1:VREF0 = 11, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-66: DNL vs. Code (code = 6 to 250) and VDD (2.7V, 5V, 5.5V) (MCP4706). VREF1:VREF0 = 11, G = 1, VREF = VDD/2, Temp = +25°C. FIGURE 2-67: INL vs. Code (code = 100 to 4000) and VREF (MCP4726). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-68: INL vs. Code (code = 25 to 1000) and VREF (MCP4716). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-69: INL vs. Code (code = 6 to 250) and VREF (MCP4706). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-70: DNL vs. Code (code = 100 to 4000) and VREF (MCP4726). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-71: DNL vs. Code (code = 25 to 1000) and VREF (MCP4716). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-72: DNL vs. Code (code = 6 to 250) and VREF (MCP4706). VDD = 5V, VREF1:VREF0 = 10, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-73: INL vs. Code (code = 100 to 4000) and VREF (MCP4726). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-74: INL vs. Code (code = 25 to 1000) and VREF (MCP4716). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-75: INL vs. Code (code = 6 to 250) and VREF (MCP4706). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-76: DNL vs. Code (code = 100 to 4000) and VREF (MCP4726). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-77: DNL vs. Code (code = 25 to 1000) and VREF (MCP4716). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-78: DNL vs. Code (code = 6 to 250) and VREF (MCP4706). VDD = 5V, VREF1:VREF0 = 11, G = 0, VREF = 1V, 2V, 3V, 4V, and 5V, Temp = +25°C. FIGURE 2-79: Output Error vs. Temperature (MCP4726). VDD = 2.7V and 5V, VREF1:VREF0 = 00, Code = 4000. FIGURE 2-80: Output Error vs. Temperature (MCP4716). VDD = 2.7V and 5V, VREF1:VREF0 = 00, Code = 1000. FIGURE 2-81: Output Error vs. Temperature (MCP4706). VDD = 2.7V and 5V, VREF1:VREF0 = 00, Code = 250. FIGURE 2-82: Output Error vs. Temperature (MCP4726). VDD = 2.7V and 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD, Code = 4000. FIGURE 2-83: Output Error vs. Temperature (MCP4716). VDD = 2.7V and 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD, Code = 1000. FIGURE 2-84: Output Error vs. Temperature (MCP4706). VDD = 2.7V and 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD, Code = 250. FIGURE 2-85: Output Error vs. Temperature (MCP4726). VDD = 2.7V and 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD, Code = 4000. FIGURE 2-86: Output Error vs. Temperature (MCP4716). VDD = 2.7V and 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD, Code = 1000. FIGURE 2-87: Output Error vs. Temperature (MCP4706). VDD = 2.7V and 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD, Code = 250. FIGURE 2-88: IDD vs. Temperature. VDD = 2.7V and 5V, VREF1:VREF0 = 00. FIGURE 2-89: IDD vs. Temperature. VDD = 2.7V and 5V, VREF1:VREF0 = 10, G = 0, VREF = VDD. FIGURE 2-90: IDD vs. Temperature. VDD = 2.7V and 5V, VREF1:VREF0 = 11, G = 0, VREF = VDD. FIGURE 2-91: Power-down Current vs. Temperature. VDD = 2.7V, 3.3V, 4.5V, 5.0V and 5.5V, PD1:PD0 = 11. FIGURE 2-92: VIH Threshold of SDA/SCL Inputs vs. Temperature and VDD. FIGURE 2-93: VIL Threshold of SDA/SCL Inputs vs. Temperature and VDD. FIGURE 2-94: VOUT vs. Resistive Load. VDD = 5.0V. FIGURE 2-95: VOUT vs. Source/Sink Current. VDD = 5.0V. FIGURE 2-96: Full-Scale Settling Time (000h to FFFh) (MCP4726). FIGURE 2-97: Full-Scale Settling Time (FFFh to 000h) (MCP4726). FIGURE 2-98: Half-Scale Settling Time (400h to C00h) (MCP4726). FIGURE 2-99: Half-Scale Settling Time (C00h to 400h) (MCP4726). FIGURE 2-100: Exiting Power-Down Mode (MCP4726, Volatile DAC Register = FFFh). 3.0 Pin descriptions TABLE 3-1: MCP47X6 Pinout Description 3.1 Analog Output Voltage Pin (VOUT) 3.2 Positive Power Supply Input (VDD) 3.3 Ground (VSS) 3.4 Serial Data Pin (SDA) 3.5 Serial Clock Pin (SCL) 3.6 Voltage Reference Pin (VREF) 3.7 Exposed Pad (EP) 4.0 General Description 4.1 Power-On Reset/Brown-Out Reset (POR/BOR) FIGURE 4-1: Power-on Reset Operation. 4.2 DAC’s (Resistor Ladder) Reference Voltage FIGURE 4-2: Resistor Ladder Reference Voltage Selection Block Diagram. 4.3 Resistor Ladder FIGURE 4-3: Resistor Ladder. 4.4 Output Buffer/VOUT Operation FIGURE 4-4: Output Buffer Block Diagram. FIGURE 4-5: VOUT pin Slew Rate. FIGURE 4-6: Circuit to Stabilize Output Buffer for Large Capacitive Loads (CL). TABLE 4-1: DAC Input Code Vs. Analog Output (VOUT) (VDD = 5.0V) 4.5 Power-Down Operation TABLE 4-2: Power-down bits and Output resistive load FIGURE 4-7: Op Amp to VOUT Pin Block Diagram. 4.6 Device Resets 4.7 DAC Registers, Configuration Bits, and Status Bits FIGURE 4-8: DAC Memory and POR Interaction. TABLE 4-3: Status Bits Operation TABLE 4-4: Configuration Bits TABLE 4-5: Configuration Bit Values after POR/BOR Event 5.0 I2C Serial Interface 5.1 Overview FIGURE 5-1: Typical I2C Interface. 5.2 Signal Descriptions 5.3 I2C Operation FIGURE 5-2: Start Bit. FIGURE 5-3: Data Bit. FIGURE 5-4: Acknowledge Waveform. TABLE 5-1: MCP47X6 A/A Responses FIGURE 5-5: Repeat Start Condition Waveform. FIGURE 5-6: Stop Condition Receive or Transmit Mode. FIGURE 5-7: Typical 8-Bit I2C Waveform Format. FIGURE 5-8: I2C Data States and Bit Sequence. FIGURE 5-9: Slave Address Bits in the I2C Control Byte. TABLE 5-2: I2C Address/Order Code FIGURE 5-10: HS Mode Sequence. FIGURE 5-11: General Call Formats. 6.0 MCP47X6 I2C Commands TABLE 6-1: I2C Commands - Number of Clocks TABLE 6-2: MCP47X6 Supported Commands 6.1 Write Volatile DAC Register FIGURE 6-1: Write Volatile DAC Register Command. 6.2 Write Volatile Memory FIGURE 6-2: Write Volatile Memory Command. 6.3 Write All Memory FIGURE 6-3: Write All Memory Command. 6.4 Write Volatile Configuration Bits FIGURE 6-4: Write Volatile Configuration Bits Command. 6.5 Read Command FIGURE 6-5: Read Command Format for 12-bit DAC (MCP4726) and 10-bit DAC (MCP4716). FIGURE 6-6: Read Command Format for 8-bit DAC (MCP4706). 6.6 I2C General Call Commands FIGURE 6-7: General Call Reset Command. FIGURE 6-8: General Call Wake-Up Command. 7.0 Terminology 7.1 Resolution 7.2 Least Significant bit (LSb) 7.3 Monotonicity 7.4 Full-Scale Error (FSE) 7.5 Zero-Scale Error (ZSE) 7.6 Offset Error FIGURE 7-1: Offset Error Example. 7.7 Integral Nonlinearity (INL) FIGURE 7-2: INL Accuracy Example. 7.8 Differential Nonlinearity (DNL) FIGURE 7-3: DNL Accuracy Example. 7.9 Gain Error FIGURE 7-4: Gain Error and Full-Scale Error Example. 7.10 Gain Error Drift 7.11 Offset Error Drift 7.12 Settling Time 7.13 Major-Code Transition Glitch 7.14 Digital Feedthrough 7.15 Power-Supply Rejection Ratio (PSRR) 8.0 Typical Applications 8.1 Connecting to I2C BUS using Pull-Up Resistors FIGURE 8-1: I2C Bus Connection Test. 8.2 Power Supply Considerations FIGURE 8-2: Example MCP47X6 Circuit with SOT-23 package. 8.3 Application Examples FIGURE 8-3: Example Circuit Of Set Point or Threshold Calibration. FIGURE 8-4: Single-Supply “Window” DAC. 8.4 Bipolar Operation FIGURE 8-5: Digitally-Controlled Bipolar Voltage Source Example Circuit. 8.5 Selectable Gain and Offset Bipolar Voltage Output FIGURE 8-6: Bipolar Voltage Source with Selectable Gain and Offset. 8.6 Designing a Double-Precision DAC FIGURE 8-7: Simple Double Precision DAC using MCP4726. 8.7 Building Programmable Current Source FIGURE 8-8: Digitally-Controlled Current Source. 8.8 Serial Interface Communication Times TABLE 8-1: Serial Interface Times / Frequencies 8.9 Software I2C Interface Reset Sequence FIGURE 8-9: Software Reset Sequence Format. 8.10 Design Considerations FIGURE 8-10: Typical Microcontroller Connections. TABLE 8-2: Package Footprint (1) 9.0 Development Support 9.1 Development Tools FIGURE 9-1: MCP47X6 PICtail ™Plus Daughter Board with PIC® Explorer 16 Development Board. FIGURE 9-2: MCP47X6 PICtail™ Plus Daughter Board with PICkit™ Serial Analyzer. TABLE 9-1: Development Tools 9.2 Technical Documentation TABLE 9-2: Technical Documentation 10.0 Packaging Information 10.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Indianapolis Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service