Datasheet MCP4802, MCP4812, MCP4822 (Microchip) - 3

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MCP4802/4812/4822 1.0 ELECTRICAL † Notice:
Stresses above those listed under “Maximum
CHARACTERISTICS
Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those
Absolute Maximum Ratings †
indicated in the operational listings of this specification V is not implied. Exposure to maximum rating conditions DD... 6.5V for extended periods may affect device reliability. All inputs and outputs .. VSS – 0.3V to VDD + 0.3V Current at Input Pins ... ±2 mA Current at Supply Pins .. ±50 mA Current at Output Pins .. ±25 mA Storage temperature .. -65°C to +150°C Ambient temp. with power applied ... -55°C to +125°C ESD protection on all pins 4 kV (HBM), 400V (MM) Maximum Junction Temperature (TJ)..+150°C
ELECTRICAL CHARACTERISTICS Electrical Specifications:
Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = 2.048V, Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF, TA = -40 to +85°C. Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions Power Requirements
Input Voltage VDD 2.7 — 5.5 V Input Current IDD — 415 750 µA All digital inputs are grounded, all analog outputs (VOUT) are unloaded. Code = 0x000h Software Shutdown Current ISHDN_SW — 3.3 6 µA Power-on Reset Threshold VPOR — 2.0 — V
DC Accuracy MCP4802
Resolution n 8 — — Bits INL Error INL -1 ±0.125 1 LSb DNL DNL -0.5 ±0.1 +0.5 LSb
Note 1 MCP4812
Resolution n 10 — — Bits INL Error INL -3.5 ±0.5 3.5 LSb DNL DNL -0.5 ±0.1 +0.5 LSb
Note 1 MCP4822
Resolution n 12 — — Bits INL Error INL -12 ±2 12 LSb DNL DNL -0.75 ±0.2 +0.75 LSb
Note 1
Offset Error VOS -1 ±0.02 1 % of FSR Code = 0x000h Offset Error Temperature VOS/°C — 0.16 — ppm/°C -45°C to +25°C Coefficient — -0.44 — ppm/°C +25°C to +85°C Gain Error gE -2 -0.10 2 % of FSR Code = 0xFFFh, not including offset error Gain Error Temperature G/°C — -3 — ppm/°C Coefficient
Note 1:
Guaranteed monotonic by design over all codes.
2:
This parameter is ensured by design, and not 100% tested.  2010-2015 Microchip Technology Inc. DS20002249B-page 3 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4822). FIGURE 2-2: DNL vs. Code and Temperature (MCP4822). FIGURE 2-3: Absolute DNL vs. Temperature (MCP4822). FIGURE 2-4: INL vs. Code and Temperature (MCP4822). FIGURE 2-5: Absolute INL vs. Temperature (MCP4822). FIGURE 2-6: INL vs. Code (MCP4822). FIGURE 2-7: DNL vs. Code and Temperature (MCP4812). FIGURE 2-8: INL vs. Code and Temperature (MCP4812). FIGURE 2-9: DNL vs. Code and Temperature (MCP4802). FIGURE 2-10: INL vs. Code and Temperature (MCP4802). FIGURE 2-11: Full-Scale VOUTA vs. Ambient Temperature and VDD. Gain = 1x. FIGURE 2-12: Full-Scale VOUTA vs. Ambient Temperature and VDD. Gain = 2x. FIGURE 2-13: Output Noise Voltage Density (VREF Noise Density) vs. Frequency. Gain = 1x. FIGURE 2-14: Output Noise Voltage (VREF Noise Voltage) vs. Bandwidth. Gain = 1x. FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Software Shutdown Current vs. Temperature and VDD. FIGURE 2-19: Offset Error vs. Temperature and VDD. FIGURE 2-20: Gain Error vs. Temperature and VDD. FIGURE 2-21: VIN High Threshold vs. Temperature and VDD. FIGURE 2-22: VIN Low Threshold vs. Temperature and VDD. FIGURE 2-23: Input Hysteresis vs. Temperature and VDD. FIGURE 2-24: VOUT High Limit vs.Temperature and VDD. FIGURE 2-25: VOUT Low Limit vs. Temperature and VDD. FIGURE 2-26: IOUT High Short vs. Temperature and VDD. FIGURE 2-27: IOUT vs. VOUT. Gain = 2x. FIGURE 2-28: VOUT Rise Time. FIGURE 2-29: VOUT Fall Time. FIGURE 2-30: VOUT Rise Time. FIGURE 2-31: VOUT Rise Time. FIGURE 2-32: VOUT Rise Time Exit Shutdown. FIGURE 2-33: PSRR vs. Frequency. 3.0 Pin descriptions TABLE 3-1: Pin Function Table for MCP4802/4812/4822 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Analog Outputs (VOUTA, VOUTB) 4.0 General Overview TABLE 4-1: LSb of each device FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Error. 4.1 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4822 (12-bit DAC). FIGURE 5-2: Write Command for MCP4812 (10-bit DAC). FIGURE 5-3: Write Command for MCP4802 (8-bit DAC). 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations 6.3 Output Noise Considerations FIGURE 6-1: Typical Connection Diagram. 6.4 Layout Considerations 6.5 Single-Supply Operation 6.6 Bipolar Operation 6.7 Selectable Gain and Offset Bipolar Voltage Output Using a Dual Output DAC 6.8 Designing a Double-Precision DAC Using a Dual DAC 6.9 Building Programmable Current Source 7.0 Development support 7.1 Evaluation and Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Cleveland Dallas Detroit Houston, TX Indianapolis Los Angeles New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Asia Pacific Office Hong Kong Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Wuhan China - Xian ASIA/PACIFIC China - Xiamen China - Zhuhai India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok EUROPE Austria - Wels Denmark - Copenhagen France - Paris Germany - Dusseldorf Germany - Munich Germany - Pforzheim Italy - Milan Italy - Venice Netherlands - Drunen Poland - Warsaw Spain - Madrid Sweden - Stockholm UK - Wokingham Worldwide Sales and Service