Datasheet LTC4300A-1, LTC4300A-2 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | Hot Swappable 2-Wire Bus Buffers |
| 页数 / 页 | 16 / 3 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 186 Kb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating
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LTC4300A-1/LTC4300A-2
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tPHL ENABLE Delay, On-Off LTC4300A-1 10 ns READY Delay, Off-On LTC4300A-1 10 ns tPLH ENABLE Delay, Off-On LTC4300A-1 95 μs READY Delay, On-Off LTC4300A-1 10 ns IOFF READY OFF State Leakage Current LTC4300A-1 ±0.1 μA VOL READY Output Low Voltage IPULLUP = 3mA, LTC4300A-1 l 0.4 V
Rise-Time Accelerators
IPULLUPAC Transient Boosted Pull-Up Current Positive Transition on SDA,SCL, VCC = 2.7V, 1 2 mA Slew Rate = 1.25V/μs (Note 2), LTC4300A-2, ACC = 0.7 • VCC2, VCC2 = 2.7V VACCDIS Accelerator Disable Threshold LTC4300A-2 0.3 • VCC2 0.5 • VCC2 V VACCEN Accelerator Enable Threshold LTC4300A-2 0.5 • VCC2 0.7 • VCC2 V IVACC ACC Input Current LTC4300A-2 ± 0.1 ±1 μA tPDOFF ACC Delay, On/Off LTC4300A-2 5 ns
Input-Output Connection
VOS Input-Output Offset Voltage 10k to VCC on SDA, SCL, VCC = 3.3V (Note 3), l 0 100 175 mV LTC4300A-2, VCC2 = 3.3V, VIN = 0.2V fSCL, SDA Operating Frequency Guaranteed by Design, Not Subject to Test 0 400 kHz CIN Digital Input Capacitance Guaranteed by Design, Not Subject to Test 10 pF VOL Output Low Voltage, Input = 0V SDA, SCL Pins, ISINK = 3mA, VCC = 2.7V, l 0 0.4 V VCC2 = 2.7V, LTC4300A-2 ILEAK Input Leakage Current SDA, SCL Pins = VCC = 5.5V, ±5 μA LTC4300A-2, VCC2 = 5.5V
Timing Characteristics
fI2C I2C Operating Frequency (Note 4) 0 400 kHz tBUF Bus Free Time Between Stop (Note 4) 1.3 μs and Start Condition thD,STA Hold Time After (Repeated) (Note 4) 0.6 μs Start Condition tsu,STA Repeated Start Condition Setup Time (Note 4) 0.6 μs tsu,STO Stop Condition Setup Time (Note 4) 0.6 μs thD, DAT Data Hold Time (Note 4) 300 ns tsu, DAT Data Setup Time (Note 4) 100 ns tLOW Clock Low Period (Note 4) 1.3 μs tHIGH Clock High Period (Note 4) 0.6 μs tf Clock, Data Fall Time (Notes 4, 5) 20 + 0.1 • CB 300 ns tr Clock, Data Rise Time (Notes 4, 5) 20 + 0.1 • CB 300 ns tPHL,SKEW High-to-Low Propagation Delay LTC4300A-1: VCC = 2.7V; VCC = 5.5V (Note 6) l 0 ±75 ns Skew, SCL-SDA LTC4300A-2: VCC = 2.7V, VCC2 = 5.5V; l 0 ±75 ns VCC = 5.5V; VCC2 = 2.7V (Note 6) 4300a12fa 3
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
tPHL ENABLE Delay, On-Off LTC4300A-1 10 ns READY Delay, Off-On LTC4300A-1 10 ns tPLH ENABLE Delay, Off-On LTC4300A-1 95 μs READY Delay, On-Off LTC4300A-1 10 ns IOFF READY OFF State Leakage Current LTC4300A-1 ±0.1 μA VOL READY Output Low Voltage IPULLUP = 3mA, LTC4300A-1 l 0.4 V
Rise-Time Accelerators
IPULLUPAC Transient Boosted Pull-Up Current Positive Transition on SDA,SCL, VCC = 2.7V, 1 2 mA Slew Rate = 1.25V/μs (Note 2), LTC4300A-2, ACC = 0.7 • VCC2, VCC2 = 2.7V VACCDIS Accelerator Disable Threshold LTC4300A-2 0.3 • VCC2 0.5 • VCC2 V VACCEN Accelerator Enable Threshold LTC4300A-2 0.5 • VCC2 0.7 • VCC2 V IVACC ACC Input Current LTC4300A-2 ± 0.1 ±1 μA tPDOFF ACC Delay, On/Off LTC4300A-2 5 ns
Input-Output Connection
VOS Input-Output Offset Voltage 10k to VCC on SDA, SCL, VCC = 3.3V (Note 3), l 0 100 175 mV LTC4300A-2, VCC2 = 3.3V, VIN = 0.2V fSCL, SDA Operating Frequency Guaranteed by Design, Not Subject to Test 0 400 kHz CIN Digital Input Capacitance Guaranteed by Design, Not Subject to Test 10 pF VOL Output Low Voltage, Input = 0V SDA, SCL Pins, ISINK = 3mA, VCC = 2.7V, l 0 0.4 V VCC2 = 2.7V, LTC4300A-2 ILEAK Input Leakage Current SDA, SCL Pins = VCC = 5.5V, ±5 μA LTC4300A-2, VCC2 = 5.5V
Timing Characteristics
fI2C I2C Operating Frequency (Note 4) 0 400 kHz tBUF Bus Free Time Between Stop (Note 4) 1.3 μs and Start Condition thD,STA Hold Time After (Repeated) (Note 4) 0.6 μs Start Condition tsu,STA Repeated Start Condition Setup Time (Note 4) 0.6 μs tsu,STO Stop Condition Setup Time (Note 4) 0.6 μs thD, DAT Data Hold Time (Note 4) 300 ns tsu, DAT Data Setup Time (Note 4) 100 ns tLOW Clock Low Period (Note 4) 1.3 μs tHIGH Clock High Period (Note 4) 0.6 μs tf Clock, Data Fall Time (Notes 4, 5) 20 + 0.1 • CB 300 ns tr Clock, Data Rise Time (Notes 4, 5) 20 + 0.1 • CB 300 ns tPHL,SKEW High-to-Low Propagation Delay LTC4300A-1: VCC = 2.7V; VCC = 5.5V (Note 6) l 0 ±75 ns Skew, SCL-SDA LTC4300A-2: VCC = 2.7V, VCC2 = 5.5V; l 0 ±75 ns VCC = 5.5V; VCC2 = 2.7V (Note 6) 4300a12fa 3