Datasheet LTC4307 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery |
| 页数 / 页 | 16 / 7 — BLOCK DIAGRA. Low Offset 2-Wire Bus Buffer with Stuck Low Timeout. … |
| 文件格式/大小 | PDF / 181 Kb |
| 文件语言 | 英语 |
BLOCK DIAGRA. Low Offset 2-Wire Bus Buffer with Stuck Low Timeout. OPERATION. Start-Up
该数据表的模型线
- LTC4307CDD#PBF LTC4307CDD#PBF LTC4307CDD#TRPBF LTC4307CDD#TRPBF LTC4307CMS8#PBF LTC4307CMS8#PBF LTC4307CMS8#TRPBF LTC4307CMS8#TRPBF LTC4307IDD#PBF LTC4307IDD#PBF LTC4307IDD#TRPBF LTC4307IDD#TRPBF LTC4307IMS8#3ZZPBF LTC4307IMS8#3ZZTRPBF LTC4307IMS8#PBF LTC4307IMS8#PBF LTC4307IMS8#TRPBF LTC4307IMS8#TRPBF
文件文字版本
LTC4307
W BLOCK DIAGRA Low Offset 2-Wire Bus Buffer with Stuck Low Timeout
8mA 8mA VCC 8 CONNECT IBOOSTSDA IBOOSTSDA SDAIN SDAOUT 6 7 SLEW RATE SLEW RATE DETECTOR DETECTOR 100k 100k CONNECT PRECHARGE PC_CONNECT PC_CONNECT 100k 8mA 8mA 100k CONNECT IBOOSTSCL IBOOSTSCL SCLIN SCLOUT 3 2 SLEW RATE SLEW RATE DETECTOR DETECTOR + CONNECT – 0.55VCC 30ms + TIMER + 0.55VCC – – 0.55V I CC BOOSTSCL IBOOSTSDA + LOGIC 0.55VCC – READY 5 CONNECT PC_CONNECT ENABLE 1 + 1.4V – GND 95μs CONNECT 4 UVLO DELAY 4307 BD
OPERATION Start-Up
During this time, the 1V precharge circuitry is active and When the LTC4307 fi rst receives power on its V forces 1V through 100k nominal resistors to the SDA CC pin, either during power-up or live insertion, it starts in an and SCL pins. Because the I/O card is being plugged undervoltage lockout (UVLO) state, ignoring any activity into a live backplane, the voltage on the backplane SDA on the SDA or SCL pins until V and SCL busses may be anywhere between 0V and VCC. CC rises above 2V (typ). This is to ensure that the LTC4307 does not try to function Precharging the SCL and SDA pins to 1V minimizes the until it has enough voltage to do so. worst-case voltage differential these pins will see at the 4307f 7
W BLOCK DIAGRA Low Offset 2-Wire Bus Buffer with Stuck Low Timeout
8mA 8mA VCC 8 CONNECT IBOOSTSDA IBOOSTSDA SDAIN SDAOUT 6 7 SLEW RATE SLEW RATE DETECTOR DETECTOR 100k 100k CONNECT PRECHARGE PC_CONNECT PC_CONNECT 100k 8mA 8mA 100k CONNECT IBOOSTSCL IBOOSTSCL SCLIN SCLOUT 3 2 SLEW RATE SLEW RATE DETECTOR DETECTOR + CONNECT – 0.55VCC 30ms + TIMER + 0.55VCC – – 0.55V I CC BOOSTSCL IBOOSTSDA + LOGIC 0.55VCC – READY 5 CONNECT PC_CONNECT ENABLE 1 + 1.4V – GND 95μs CONNECT 4 UVLO DELAY 4307 BD
OPERATION Start-Up
During this time, the 1V precharge circuitry is active and When the LTC4307 fi rst receives power on its V forces 1V through 100k nominal resistors to the SDA CC pin, either during power-up or live insertion, it starts in an and SCL pins. Because the I/O card is being plugged undervoltage lockout (UVLO) state, ignoring any activity into a live backplane, the voltage on the backplane SDA on the SDA or SCL pins until V and SCL busses may be anywhere between 0V and VCC. CC rises above 2V (typ). This is to ensure that the LTC4307 does not try to function Precharging the SCL and SDA pins to 1V minimizes the until it has enough voltage to do so. worst-case voltage differential these pins will see at the 4307f 7