Datasheet LTC4309 (Analog Devices) - 10

LTC4309
OPERATION
has disconnected the input and output busses due to a
ENABLE
bus stuck low condition. READY goes high when ENABLE When the ENABLE pin is driven below 0.8V with respect is high and start-up is complete. The pin is driven by an to the LTC4309’s ground, the input pin is disconnected open drain pull-down device capable of sinking 3mA from the output pin and the READY pin is internally pulled while holding 0.4V on the pin. Connect a resistor to the low. When the pin is driven above 2V, the part waits for bus pull-up supply to provide the pull-up. data transactions on both the input and output pins to be
FAULT
complete (as described in the Start-Up section) before
Digital Output
connecting the two sides. At this time the internal pull- This pin provides a digital flag which is low when SDA down on READY releases. or SCL is low for 30ms (typical). The pin is driven by an A rising edge on ENABLE after a fault has occurred forces a open drain pull-down capable of sinking 3mA while hold- connection between SDAIN, SDAOUT and SCLIN, SCLOUT, ing 0.4V on the pin. Connect a resistor from FAULT to the even if the bus stuck low conditions has not been cleared. bus pull-up supply to provide the pull-up. At this time, the 30ms timer is reset, but not disabled.
APPLICATIONS INFORMATION Live Insertion and Capacitance Buffering Application
resistor is used to hold the ENABLE pin low during live insertion, until the backplane control circuitry can enable Figures 4 and 5 illustrate applications of the LTC4309 that the device. take advantage of the LTC4309’s Hot SwapTM, capacitance buffering and precharge features. If the I/O cards were
Repeater/Bus Extender Applications
plugged directly into the backplane without the LTC4309 buffer, all of the backplane and card capacitances would Users who wish to connect two 2-wire systems separated add directly together, making rise time and fall time re- by a distance can do so by connecting two LTC4309s back- quirements difficult to meet. Placing an LTC4309 on the to-back, as shown in Figure 6. The I2C specification allows edge of each card, however, isolates the card capacitance for 400pF maximum bus capacitance, severely limiting from the backplane. For a given I/O card, the LTC4309 the length of the bus. The SMBus specification places no drives the capacitance of everything on the card and the restriction on bus capacitance, but the limited impedances backplane must drive only the capacitance of the LTC4309, of devices connected to the bus require systems to remain which is less than 10pF. small if rise time and fall time specifications are to be met. In this situation, the differential ground voltage between Figure 4 shows the LTC4309 used in the typical staggered the two systems may limit the allowed distance, because connector application, where VCC and GND are the longest a valid logic low voltage with respect to the ground at one “early power” pins. The “early power” pins ensure the end of the system may violate the allowed V LTC4309 is initially powered and forcing a 1V precharge OL specification with respect to the ground at the other end. In addition, voltage on the medium length SDA and SCL pins before the connection circuitry offset voltages of the back-to- they contact to the backplane busses. Coupled with back LTC4309s add together, directly contributing to the ENABLE as the shortest pin, passively pulled to ground same problem. by a resistor, the staggered approach provides additional time for transients associated with live insertion to settle Figure 7 further illustrates a repeater application. In before the LTC4309 can be enabled. AdvancedTCA applications, the bus pull-up resistance can be quite small. Since there is no effect on the offset due Figure 5 shows the LTC4309 in an application where all of the pins have the same length. In this application, a Hot Swap is a trademark of Linear Technology Corporation. 4309fa 10