Datasheet LTC4313-1, LTC4313-2, LTC4313-3 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 2-Wire Bus Buffers with High Noise Margin |
| 页数 / 页 | 20 / 3 — elecTrical characTerisTics. The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 296 Kb |
| 文件语言 | 英语 |
elecTrical characTerisTics. The. denotes the specifications which apply over the full operating
该数据表的模型线
- LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LTC4313CDD-2#PBF LTC4313CDD-2#TRPBF LTC4313CDD-3#PBF LTC4313CDD-3#TRPBF LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTC4313CMS8-2#PBF LTC4313CMS8-2#TRPBF LTC4313CMS8-3#PBF LTC4313CMS8-3#TRPBF LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LTC4313IDD-2#PBF LTC4313IDD-2#TRPBF LTC4313IDD-3#PBF LTC4313IDD-3#TRPBF LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF LTC4313IMS8-2#PBF LTC4313IMS8-2#TRPBF LTC4313IMS8-3#PBF LTC4313IMS8-3#TRPBF
- LTC4313CDD-1#PBF LTC4313CDD-1#TRPBF LTC4313CMS8-1#PBF LTC4313CMS8-1#TRPBF LTC4313IDD-1#PBF LTC4313IDD-1#TRPBF LTC4313IMS8-1#PBF LTC4313IMS8-1#TRPBF
文件文字版本
LTC4313-1/LTC4313-2/ LTC4313-3
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply/Start-Up
VCC Input Supply Voltage l 2.9 5.5 V VDD,BUS 2-Wire Bus Supply Voltage LTC4313-1, LTC4313-2 l 2.9 5.5 V LTC4313-3 l 1.4 5.5 V ICC Input Supply Current VENABLE = VCC = 5.5V, VSDAIN,SCLIN = 0V l 6 8.1 10 mA (Note 3) ICC(DISABLED) Input Supply Current VENABLE = 0V, VCC = 5.5V, l 2.5 3.5 4.5 mA VSDAIN,SCLIN = 0V VTH_UVLO VCC UVLO Threshold VCC Rising l 2.55 2.7 2.85 V VCC_UVLO(HYST) UVLO Threshold Hysteresis Voltage 200 mV VPRE Precharge Voltage SDA, SCL Pins Open l 0.8 1 1.2 V
Buffers
VOS(SAT) Buffer Offset Voltage IOL = 4mA, Driven VSDA,SCL = 50mV l 100 190 280 mV IOL = 500µA, Driven VSDA,SCL = 50mV l 15 60 120 mV VOS Buffer Offset Voltage IOL = 4mA, Driven VSDA,SCL = 200mV l 50 120 180 mV IOL = 500µA, Driven VSDA,SCL = 200mV l 15 60 115 mV VIL, FALLING Buffer Input Logic Low Voltage VCC = 2.9V, 3.3V, 5.5V l 0.3•VCC 0.33•VCC 0.36•VCC V ∆VIL(HYST) VIL Hysteresis Voltage 50 mV ILEAK Input Leakage Current SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V l ±10 µA CIN Input Capacitance SDA, SCL Pins (Note 4) l 10 pF
Rise Time Accelerators (LTC4313-1 and LTC4313-2 Only)
dV/dt(RTA) Minimum Slew Rate Requirement SDA, SCL Pins, VCC = 5V l 0.1 0.2 0.4 V/µs VRTA(TH) Rise Time Accelerator DC Threshold Voltage VCC = 5V l 0.38 •VCC 0.41•VCC 0.44•VCC V ∆VACC Buffers Off to Accelerator On Voltage SDA, SCL Pins, VCC = 5V l 0.05•VCC 0.07•VCC mV IRTA Rise Time Accelerator Pull-Up Current SDA, SCL Pins, VCC = 5V (Note 5) LTC4313-1 l 15 25 40 mA LTC4313-2 l 1.5 2.5 3.5 mA
Enable/Control
VEN(TH) ENABLE Threshold Voltage l 1 1.4 1.8 V ILEAK ENABLE Leakage Current VENABLE = 5.5V l 0.1 ±10 µA VREADY(OL) READY Output Low Voltage IREADY = 3mA, VCC = 5V l 0.4 V IREADY(OH) READY Off Leakage Current VCC = VREADY = 5V l 0.1 ±5 µA
Stuck Low Timeout Circuitry
tTIMEOUT Bus Stuck Low Timer l 35 45 55 ms
I2C Interface Timing
fSCL(MAX) I2C Frequency Max l 400 kHz tPDHL SCL, SDA Fall Delay VCC = VDD,BUS = 5V, CBUS = 100pF, 130 250 ns RBUS = 10kΩ (Note 4) tf SCL, SDA Fall Times VCC = VDD,BUS = 5V, CBUS = 100pF, 20 300 ns RBUS = 10kΩ (Note 4) tIDLE Bus Idle Time l 55 95 175 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
Guaranteed by design and not tested. may cause permanent damage to the device. Exposure to any Absolute
Note 5:
Measured in a special DC mode with V Maximum Rating condition for extended periods may affect device SDA,SCL = VRTA(TH) + 1V. The transient I reliability and lifetime. RTA during rising edges for the LTC4313-1 will depend on the bus loading condition and the slew rate of the bus. The LTC4313-1’s
Note 2:
All currents into pins are positive and all voltages are referenced to internal slew rate control circuitry limits the maximum bus rise rate to GND unless otherwise indicated. 75V/µs by controlling the transient IRTA.
Note 3:
Test performed with SDA, SCL buffers active. 4313123f 3 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply/Start-Up
VCC Input Supply Voltage l 2.9 5.5 V VDD,BUS 2-Wire Bus Supply Voltage LTC4313-1, LTC4313-2 l 2.9 5.5 V LTC4313-3 l 1.4 5.5 V ICC Input Supply Current VENABLE = VCC = 5.5V, VSDAIN,SCLIN = 0V l 6 8.1 10 mA (Note 3) ICC(DISABLED) Input Supply Current VENABLE = 0V, VCC = 5.5V, l 2.5 3.5 4.5 mA VSDAIN,SCLIN = 0V VTH_UVLO VCC UVLO Threshold VCC Rising l 2.55 2.7 2.85 V VCC_UVLO(HYST) UVLO Threshold Hysteresis Voltage 200 mV VPRE Precharge Voltage SDA, SCL Pins Open l 0.8 1 1.2 V
Buffers
VOS(SAT) Buffer Offset Voltage IOL = 4mA, Driven VSDA,SCL = 50mV l 100 190 280 mV IOL = 500µA, Driven VSDA,SCL = 50mV l 15 60 120 mV VOS Buffer Offset Voltage IOL = 4mA, Driven VSDA,SCL = 200mV l 50 120 180 mV IOL = 500µA, Driven VSDA,SCL = 200mV l 15 60 115 mV VIL, FALLING Buffer Input Logic Low Voltage VCC = 2.9V, 3.3V, 5.5V l 0.3•VCC 0.33•VCC 0.36•VCC V ∆VIL(HYST) VIL Hysteresis Voltage 50 mV ILEAK Input Leakage Current SDA, SCL Pins = 5.5V, VCC = 5.5V, 0V l ±10 µA CIN Input Capacitance SDA, SCL Pins (Note 4) l 10 pF
Rise Time Accelerators (LTC4313-1 and LTC4313-2 Only)
dV/dt(RTA) Minimum Slew Rate Requirement SDA, SCL Pins, VCC = 5V l 0.1 0.2 0.4 V/µs VRTA(TH) Rise Time Accelerator DC Threshold Voltage VCC = 5V l 0.38 •VCC 0.41•VCC 0.44•VCC V ∆VACC Buffers Off to Accelerator On Voltage SDA, SCL Pins, VCC = 5V l 0.05•VCC 0.07•VCC mV IRTA Rise Time Accelerator Pull-Up Current SDA, SCL Pins, VCC = 5V (Note 5) LTC4313-1 l 15 25 40 mA LTC4313-2 l 1.5 2.5 3.5 mA
Enable/Control
VEN(TH) ENABLE Threshold Voltage l 1 1.4 1.8 V ILEAK ENABLE Leakage Current VENABLE = 5.5V l 0.1 ±10 µA VREADY(OL) READY Output Low Voltage IREADY = 3mA, VCC = 5V l 0.4 V IREADY(OH) READY Off Leakage Current VCC = VREADY = 5V l 0.1 ±5 µA
Stuck Low Timeout Circuitry
tTIMEOUT Bus Stuck Low Timer l 35 45 55 ms
I2C Interface Timing
fSCL(MAX) I2C Frequency Max l 400 kHz tPDHL SCL, SDA Fall Delay VCC = VDD,BUS = 5V, CBUS = 100pF, 130 250 ns RBUS = 10kΩ (Note 4) tf SCL, SDA Fall Times VCC = VDD,BUS = 5V, CBUS = 100pF, 20 300 ns RBUS = 10kΩ (Note 4) tIDLE Bus Idle Time l 55 95 175 µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
Guaranteed by design and not tested. may cause permanent damage to the device. Exposure to any Absolute
Note 5:
Measured in a special DC mode with V Maximum Rating condition for extended periods may affect device SDA,SCL = VRTA(TH) + 1V. The transient I reliability and lifetime. RTA during rising edges for the LTC4313-1 will depend on the bus loading condition and the slew rate of the bus. The LTC4313-1’s
Note 2:
All currents into pins are positive and all voltages are referenced to internal slew rate control circuitry limits the maximum bus rise rate to GND unless otherwise indicated. 75V/µs by controlling the transient IRTA.
Note 3:
Test performed with SDA, SCL buffers active. 4313123f 3 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts