Datasheet LTC4317 (Analog Devices) - 5

制造商Analog Devices
描述Dual I2C/SMBus Address Translator
页数 / 页16 / 5 — Typical perForMance characTerisTics. TA = 25°C, VCC = 3.3V unless …
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Typical perForMance characTerisTics. TA = 25°C, VCC = 3.3V unless otherwise noted. SDAOUT Fall Delay vs Bus

Typical perForMance characTerisTics TA = 25°C, VCC = 3.3V unless otherwise noted SDAOUT Fall Delay vs Bus

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LTC4317
Typical perForMance characTerisTics TA = 25°C, VCC = 3.3V unless otherwise noted. SDAOUT Fall Delay vs Bus SDAOUT Fall Time vs SDAOUT Fall Time vs Bus Capacitance Temperature Capacitance
300 120 120 C = 100pF 275 100 100 250 V V CC = 5V CC = 5V VCC = 5V (ns) 225 VCC = 3.3V (ns) 80 (ns) 80 200 VCC = 2.25V V V CC = 3.3V CC = 3.3V 175 60 60 t f(SDAOUT) t f(SDAOUT) t PDHL(SDAOUT) 150 40 V V 40 CC = 2.25V CC = 2.25V 125 100 20 20 0 200 400 600 800 1000 –50 –25 0 25 50 75 100 0 200 400 600 800 1000 CBUS (pF) TEMPERATURE (°C) CBUS (pF) 4317 G07 4317 G08 4317 G09
pin FuncTions XORL1/XORL2:
Translator XOR Lower Nibble Configura- SDAIN is connected to SDAOUT and SCLIN is connected to tion Input. The DC voltage at this pin configures the lower SCLOUT. Connect a pull-up resistor, typically 10k, from this pin 4-bit nibble of the address translation byte. Tie the pin to to the bus pull-up supply. Leave open or tie to GND if unused. an external resistive divider connected between VCC and
SCLIN:
Input Bus Clock Input and Output. Connect this GND to set the desired DC voltage. pin to the SCL line on the master side. An external pull-up
XORH1/XORH2:
Translator XOR Upper Nibble Configura- resistor or current source is required. tion Input. The DC voltage at this pin configures the upper
SCLOUT1/SCLOUT2:
Output Bus Clock Input and Output. 3-bit nibble of the address translation byte. Tie the pin to Connect this pin to the SCL line on the slave side. An external an external resistive divider connected between VCC and pull-up resistor or current source is required. Connect to GND to set the desired DC voltage. Connect this pin to VCC V to activate pass-through mode. See Application Informa- CC through a pull-up resistor if unused. tion section for more details.
SDAIN:
Input Bus Data Input and Output. Connect this pin to the SDA line on the master side. An external pull-up
ENABLE1/ENABLE2:
Enable Input. If ENABLE pin is low, resistor or current source is required. the address translation is disabled, SDAIN is disconnected from SDAOUT, and SCLIN is disconnected from SCLOUT.
SDAOUT1/SDAOUT2:
Output Bus Data Input and Output. A low to high transition on ENABLE restarts the configura- Connect this pin to the SDA line on the slave side. An tion of the address translation byte and also enables the external pull-up resistor or current source is required. address translation. Connect to VCC if unused. Connect to VCC through a pull-up resistor if unused.
Exposed Pad:
Exposed pad may be left open or connected
VCC:
Power Supply Input (2.25V to 5.5V). If the supply to device GND. voltages for the input and output buses are different, con- nect this pin to the lower supply. If the input and output
GND:
Device Ground. supplies have the same nominal value and with tolerance
READY1/READY2:
Ready Status Output. This is an open less than or equal to ±10%, connect VCC to either supply. drain output to indicate that the device is ready for address Bypass with at least 0.1µF to GND. translation. The pin releases high when the LTC4317 has completed configuration of the address translation byte, 4317fa For more information www.linear.com/LTC4317 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Timing Diagram Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts