Datasheet LTC4401-1, LTC4401-2 (Analog Devices) - 10

LTC4401-1/LTC4401-2
U U W U APPLICATIO S I FOR ATIO Determining External Loop Gain and Bandwidth
PCTL from 300mV to 400mV. VPCA/B will increase to supply enough feedback voltage to the RF pin to cancel The external loop voltage gain contributed by the RF chan- this 100mV step which would be the required detected nel and directional coupler network should be measured in voltage step of 122mV. V a closed-loop configuration. A voltage step is applied to PCA/B changed from 1.5V to 1.561V to create the RF output power change required. PCTL and the change in VPCA/B is measured. The detected The net external voltage gain contributed by the RF power voltage is K • PCTL, where K is the internal gain between amplifier and directional coupler network can be calcu- PCTL and the RF pin, and the external voltage gain contrib- lated by dividing the 122mV change at the RF pin by the uted by the RF power amplifier and directional coupler 61mV change at the V network is K • ∆V PCA/B pin. The net external voltage PCTL/∆VVPC. Measuring voltage gain in gain would then be approximately 2. The loop bandwidth the closed-loop configuration accounts for the nonlinear extends to 2 • BW1. If BW1 is 130kHz, the loop bandwidth detector gain that is dependent on RF input voltage and increases to approximately 260kHz. The phase margin can frequency. be determined from Figures 2 and 3. Repeat the above The LTC4401-X unity gain bandwidth specified in the data voltage gain measurement over the full power and fre- sheet assumes that the net voltage gain contributed by the quency range. RF power amplifier and directional coupler is unity. The External pole frequencies within the loop will further bandwidth is calculated by measuring the rise time be- reduce phase margin. The phase margin degradation, due tween 10% and 90% of the voltage change at VPCA/B for a to external and internal pole combinations, is difficult to small step in voltage applied to PCTL. determine since complex poles are present. Gain peaking BW1 = 0.35/rise time may occur, resulting in higher bandwidth and lower phase The LTC4401-X control amplifier unity gain bandwidth margin than predicted from the open-loop Bode plot. A (BW1) is typically 250kHz below a PCTL voltage of 80mV. low frequency AC SPICE model of the LTC4401-X power controller is included to better determine pole and zero For PCTL voltages < 80mV, the RF detected voltage is interactions. The user can apply external gains and poles 0.6PCTL. For PCTL voltages >160mV, RF detected voltage to determine bandwidth and phase margin. DC, transient is 1.22PCTL – 0.1. This change in gain is due to an internal and RF information cannot be extracted from the present compression circuit designed to extend the detector range. model. The model is suitable for external gain evaluations For example, to determine the external RF channel loop up to 6 ×. The 270kHz PCTL input filter limits the band- voltage gain with the loop closed, apply a 100mV step to width, therefore, use the RF input as demonstrated in the model. Gain compression is not modeled. 80 160 80 180 R 70 RLOAD = 2k 140 70 LOAD = 2k 160 C CLOAD = 33pF 60 LOAD = 33pF 120 60 140 PCTL = 60mV 50 PHASE 100 50 120 40 80 40 PHASE 100 PHASE (DEG) 30 60 PHASE (DEG) 30 80 20 40 20 60 GAIN 10 20 10 GAIN 40 0 0 0 20 –10 –20 –10 0 VOLTAGE GAIN (dB) –20 –40 VOLTAGE GAIN (dB) –20 –20 –30 –60 –30 –40 –40 –80 –40 –60 –50 –100 –50 –80 –60 –120 –60 –100 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) 4401 F02 4401 F03
Figure 2. Measured Open-Loop Gain and Phase, PCTL < 80mV Figure 3. Measured Open-Loop Gain and Phase, PCTL > 160mV
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