Datasheet ADXL356, ADXL357 (Analog Devices) - 6

ADXL356/ADXL357 Data Sheet SPI DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL357
Note that multifunction pin names may be referenced by their relevant function only.
Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
DC INPUT LEVELS Input Voltage Low Level V 0.3 × V V IL DDIO High Level V 0.7 × V V IH DDIO Input Current Low Level I V = 0 V −0.1 µA IL IN High Level I V = V 0.1 µA IH IN DDIO DC OUTPUT LEVELS Output Voltage Low Level V I = I 0.2 × V V OL OL OL, MIN DDIO High Level V I = I 0.8 × V V OH OH OH, MAX DDIO Output Current Low Level I V = V −10 mA OL OL OL, MAX High Level I V = V 4 mA OH OH OH, MIN AC INPUT LEVELS SCLK Frequency 0.1 10 MHz SCLK High Time t 40 ns HIGH SCLK Low Time t 40 ns LOW CS Setup Time t 20 ns CSS CS Hold Time t 20 ns CSH CS Disable Time t 40 ns CSD Rising SCLK Setup Time t 20 ns SCLKS MOSI Setup Time t 20 ns SU MOSI Hold Time t 20 ns HD AC OUTPUT LEVELS Propagation Delay t C = 30 pF 30 ns P LOAD Enable MISO Time t 30 ns EN Disable MISO Time t 20 ns DIS
tCSD CS t t CSH t CSS t t HIGH LOW SCLKS SCLK tSU tHD MOSI t t t P DIS EN
003
MISO
15429- Figure 3. SPI Interface Timing Diagram Rev. 0 | Page 6 of 42 Document Outline Features Applications Functional Block Diagrams General Description Revision History Specifications Analog Output for the ADXL356 Digital Output for the ADXL357 SPI Digital Interface Characteristics for the ADXL357 I2C Digital Interface Characteristics for the ADXL357 Absolute Maximum Ratings Thermal Resistance Recommended Soldering Profile ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Root Allan Variance (RAV) ADXL357 Characteristics Theory of Operation Applications Information Analog Output Digital Output Axes of Acceleration Sensitivity Power Sequencing Power Supply Description VSUPPLY V1P8ANA V1P8DIG VDDIO Overrange Protection Self Test Filter Serial Communications SPI Protocol I2C Protocol Reading Acceleration or Temperature Data from the Interface FIFO Interrupts DATA_RDY DRDY Pin FIFO_FULL FIFO_OVR Activity NVM_BUSY External Synchronization and Interpolation EXT_SYNC = 00—No External Sync or Interpolation EXT_SYNC = 10—External Sync with Interpolation EXT_SYNC = 01—External Sync and External Clock, No Interpolation Filter ADXL357 Register Map Register Definitions Analog Devices ID Register Address: 0x00, Reset: 0xAD, Name: DEVID_AD Analog Devices MEMS ID Register Address: 0x01, Reset: 0x1D, Name: DEVID_MST Device ID Register Address: 0x02, Reset: 0xED, Name: PARTID Product Revision ID Register Address: 0x03, Reset: 0x01, Name: REVID Status Register Address: 0x04, Reset: 0x00, Name: Status FIFO Entries Register Address: 0x05, Reset: 0x00, Name: FIFO_ENTRIES Temperature Data Registers Address: 0x06, Reset: 0x00, Name: TEMP2 Address: 0x07, Reset: 0x00, Name: TEMP1 X-Axis Data Registers Address: 0x08, Reset: 0x00, Name: XDATA3 Address: 0x09, Reset: 0x00, Name: XDATA2 Address: 0x0A, Reset: 0x00, Name: XDATA1 Y-Axis Data Registers Address: 0x0B, Reset: 0x00, Name: YDATA3 Address: 0x0C, Reset: 0x00, Name: YDATA2 Address: 0x0D, Reset: 0x00, Name: YDATA1 Z-Axis Data Registers Address: 0x0E, Reset: 0x00, Name: ZDATA3 Address: 0x0F, Reset: 0x00, Name: ZDATA2 Address: 0x10, Reset: 0x00, Name: ZDATA1 FIFO Access Register Address: 0x11, Reset: 0x00, Name: FIFO_DATA X-Axis Offset Trim Registers Address: 0x1E, Reset: 0x00, Name: OFFSET_X_H Address: 0x1F, Reset: 0x00, Name: OFFSET_X_L Y-Axis Offset Trim Registers Address: 0x20, Reset: 0x00, Name: OFFSET_Y_H Address: 0x21, Reset: 0x00, Name: OFFSET_Y_L Z-Axis Offset Trim Registers Address: 0x22, Reset: 0x00, Name: OFFSET_Z_H Address: 0x23, Reset: 0x00, Name: OFFSET_Z_L Activity Enable Register Address: 0x24, Reset: 0x00, Name: ACT_EN Activity Threshold Registers Address: 0x25, Reset: 0x00, Name: ACT_THRESH_H Address: 0x26, Reset: 0x00, Name: ACT_THRESH_L Activity Count Register Address: 0x27, Reset: 0x01, Name: ACT_COUNT Filter Settings Register Address: 0x28, Reset: 0x00, Name: Filter FIFO Samples Register Address: 0x29, Reset: 0x60, Name: FIFO_SAMPLES Interrupt Pin (INTx) Function Map Register Address: 0x2A, Reset: 0x00, Name: INT_MAP Data Synchronization Address: 0x2B, Reset: 0x00, Name: Sync I2C Speed, Interrupt Polarity, and Range Register Address: 0x2C, Reset: 0x81, Name: Range Power Control Register Address: 0x2D, Reset: 0x01, Name: POWER_CTL Self Test Register Address: 0x2E, Reset: 0x00, Name: SELF_TEST Reset Register Address: 0x2F, Reset: 0x00, Name: Reset PCB Footprint Pattern Outline Dimensions Ordering Guide