Datasheet ADIS16485 (Analog Devices) - 5

Data Sheet ADIS16485 Parameter Test Conditions/Comments Min Typ Max Unit
FLASH MEMORY Endurance5 100,000 Cycles 4F4F Data Retention 6 TJ = 85°C 20 Years 5F5F FUNCTIONAL TIMES7 Time until data is available 6F6F Power-On, Start-Up Time 400 ± 160 ms Reset Recovery Time8 400 ± 160 ms 7F7F Sleep Mode Recovery Time 500 µs Flash Memory Update Time 900 ms Flash Memory Test Time 66 ms Automatic Self Test Time Using internal clock, 100 SPS 12 ms CONVERSION RATE 2.46 kSPS Initial Clock Accuracy 0.02 % Temperature Coefficient 40 ppm/°C Sync Input Clock9 0.7 2.4 kHz 8F8F POWER SUPPLY, VDD Operating voltage range 3.0 3.6 V Power Supply Current10 Normal mode, VDD = 3.3 V, µ ± σ 197 mA 9F9F Sleep mode, VDD = 3.3 V 12.2 mA Power-down mode, VDD = 3.3 V 37 µA POWER SUPPLY, VDDRTC Operating voltage range 3.0 3.6 V Real-Time Clock Supply Current Normal mode, VDDRTC = 3.3 V 13 µA 1 The repeatability specifications represent analytical projections that are based off of the fol owing drift contributions and conditions: temperature hysteresis (−40°C to +85°C), electronics drift (high temperature operating life test: +110°C, 500 hours), drift from temperature cycling (JESD22, Method A104-C, Method N, 500 cycles, −40°C to +85°C), rate random walk (10 year projection), and broadband noise 2 Bias repeatability describes a long-term behavior over a variety of conditions. Short-term repeatability is related to the in-run bias stability and noise density specifications. 3 The digital I/O signals use a 3.3 V system. 4 RST and CS pins are connected to the VDD pin through 10 kΩ pull-up resistors. 5 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. 6 The data retention specification assumes a junction temperature (TJ) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ. 7 These times do not include thermal settling and internal filter response times, which can affect overall accuracy. 8 The RST line must be in a low state for at least 10 μs to assure a proper reset initiation and recovery. 9 The device functions at clock rates below 0.7 kHz but at reduced performance levels. 10 Supply current transients can reach 600 mA during start-up and reset recovery. Rev. G | Page 5 of 32 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Basic Operation Register Structure SPI Communication Device Configuration Dual Memory Structure Reading Sensor Data User Registers Output Data Registers Inertial Sensor Data Format Rotation Rate (Gyroscope) Acceleration Delta Angles Delta Velocity Internal Temperature Status/Alarm Indicators Firmware Revision Product Identification Digital Signal Processing Gyroscopes/Accelerometers Averaging/Decimation Filter FIR Filter Banks Filter Memory Organization Default Filter Performance Calibration Gyroscopes Manual Bias Correction Bias Null Command Manual Sensitivity Correction Linear Acceleration on Effect on Gyroscope Bias Accelerometers Manual Bias Correction Manual Sensitivity Correction Restoring Factory Calibration Point of Percussion Alignment Alarms Static Alarm Use Dynamic Alarm Use Alarm Example System Controls Global Commands Software Reset Automatic Self Test Memory Management Flash Memory Test General-Purpose I/O Data-Ready Indicator Input Sync/Clock Control General-Purpose I/O Control Power Management General-Purpose Registers Real-Time Clock Configuration/Data Applications Information Mounting Tips Evaluation Tools Breakout Board, ADIS16IMU/PCBZ PC-Based Evaluation, EVAL-ADIS2 Power Supply Considerations Outline Dimensions Ordering Guide