Datasheet LT1249 (Linear Technology) - 8

LT1249
U U W U APPLICATIONS INFORMATION
The Figure 3 circuit therefore has 382V on V LINE MAIN INDUCTOR OUT, and an overvoltage level = (V NP R1 OUT + 44V), or 426V. With a 22µA NS 90k hysteresis, V 1W OUT then has to drop 22V to 404V before feedback recovers and the switch turns back on. D1 D3 VCC M + OUT is a high impedance current output. In the current C1 2µF loop, offset line current is determined by multiplier offset + + C3 C4 D2 + 390µF 56µF current and input offset voltage of the current amplifier. C2 2µF A negative 4mV current amplifier VOS translates into 20mA line current and 5W input power for 250V line if 1249 F04 ALL CAPACITORS ARE RATED 35V 0.2Ω sense resistor is used. Under no load or when the
Figure 4. Power Supply for LT1249
load power is less than this offset input power, VOUT would slowly charge up to an overvoltage state because the overvoltage comparator can only reduce multiplier output C2 current to zero. This does not guarantee zero output 1000pF MAIN INDUCTOR LINE current if the current amplifier has offset. To regulate V 450V OUT under this condition, the amplifier M1 (see Block Dia- R1 90k gram), becomes active in the current loop when VA D2 D3 OUT 1W VCC goes down to 1V. The M1 can put out up to 15µA to the 4k + C3 + C4 D1 resistor at the inverting input to cancel the current ampli- 390µF 18V 56µF 35V 35V fier negative VOS and keep VOUT error to within 2V. 1249 F05
Undervoltage Lockout Figure 5. Power Supply for LT1249
The LT1249 turns on when VCC is higher than 16V and remains on until VCC falls below 10V, whereupon the chip auxiliary winding determines VCC according to: VOUT/(VCC enters the lockout state. In the lockout state, the LT1249 – 2V) = NP/NS. For 382V VOUT and 18V VCC, NP/NS ≈ 19. only draws 250µA, the oscillator is off, the VREF and the GTDR pins remain low to keep the power MOSFET off. In Figure 5 a new technique for supply voltage eliminates the need for an extra inductor winding. It uses capacitor
Start-Up and Supply Voltage
charge transfer to generate a constant current source which feeds a Zener diode. Current to the Zener is equal to The LT1249 draws only 250µA before the chip starts at (V 16V on V OUT – VZ)(C)(f), where VZ is Zener voltage and f is CC. To trickle start, a 90k resistor from the power switching frequency. For V line to V OUT = 382V, VZ = 18V, C = CC supplies the trickle current and C4 holds the VCC 1000pF and f = 100kHz, Zener current will be 36mA. This up while switching starts (see Figure 4). Then the auxiliary is enough to operate the LT1249, including the FET gate winding takes over and supplies the operating current. drive. Note that D3 and the large value C3, in both Figures 4 and 5, are only necessary for systems that have sudden large
Output Capacitor
load variation down to minimum load and/or very light load conditions. Under these conditions, the loop may The peak-to-peak 120Hz output ripple is determined by: exhibit a start/restart mode because switching remains off VP-P = (2)(ILOADDC)(Z) long enough for C4 to discharge below 10V. The C3 will where I hold V LOADDC: DC load current CC up until switching resumes. For less severe load Z: capacitor impedance at 120Hz variations, D3 is replaced with a short and C3 is omitted. The turns ratio between the primary winding and the For 180µF at 300W load, ILOADDC = 300W/385V = 0.78A, 8