Datasheet AD8450 (Analog Devices) - 7

制造商Analog Devices
描述Precision Analog Front End and Controller for Battery Test/Formation Systems
页数 / 页42 / 7 — AD8450. Data Sheet. Parameter. Test Conditions/Comments. Min. Typ. Max. …
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AD8450. Data Sheet. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

AD8450 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit

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AD8450 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
CURRENT SHARING BUS AMPLIFIER Nominal Gain 1 V/V Offset Voltage 150 µV Offset Voltage Drift TA = TMIN to TMAX 0.6 µV/°C Output Voltage Swing AVEE + 1.5 AVCC − 1.5 V Over Temperature TA = TMIN to TMAX AVEE + 1.7 AVCC − 1.7 V Capacitive Load Drive 1000 pF Source Short-Circuit Current 40 mA Sink Short-Circuit Current 0.5 mA CMRR ΔVCM = 10 V 100 dB PSRR ΔVS = 20 V 100 dB Voltage Noise f = 1 kHz 10 nV/√Hz Voltage Noise, Peak-to-Peak f = 0.1 Hz to 10 Hz 0.4 µV p-p Small Signal −3 dB Bandwidth 3 MHz Slew Rate ΔVCS = 10 V 1 V/µs Transition Time 1.5 µs CURRENT SHARING, VINT, AND CONSTANT VOLTAGE BUFFERS Nominal Gain 1 V/V Offset Voltage 150 µV Offset Voltage Drift TA = TMIN to TMAX 0.6 µV/°C Input Bias Current CV buffer only −5 +5 nA Over Temperature TA = TMIN to TMAX −5 +5 nA Input Voltage Range AVEE + 1.5 AVCC − 1.8 V Output Voltage Swing Current Sharing and Constant AVEE + 1.5 AVCC − 1.5 V Voltage Buffers Over Temperature TA = TMIN to TMAX AVEE + 1.7 AVCC − 1.5 V VINT Buffer VVCLN − 0.6 VVCLP + 0.6 V Over Temperature TA = TMIN to TMAX VVCLN − 0.6 VVCLP + 0.6 V Output Clamps Voltage Range VINT buffer only VCLP Pin VVCLN AVCC − 1 V VCLN Pin AVEE + 1 VVCLP V Closed-Loop Output Impedance 1 Ω Capacitive Load Drive 1000 pF Short-Circuit Current 40 mA PSRR ΔVS = 20 V 100 dB Voltage Noise f = 1 kHz 10 nV/√Hz Voltage Noise, Peak-to-Peak f = 0.1 Hz to 10 Hz 0.3 µV p-p Current Noise f = 1 kHz, CV buffer only 80 fA/√Hz Current Noise, Peak-to-Peak f = 0.1 Hz to 10 Hz 5 pA p-p Small Signal −3 dB Bandwidth 3 MHz Slew Rate ΔVOUT = 10 V 1 V/µs OVERCURRENT AND OVERVOLTAGE FAULT COMPARATORS High Threshold Voltage With respect to OVPR and OCPR pins 30 45 mV Temperature Coefficient 100 µV/°C Low Threshold Voltage With respect to OVPR and OCPR pins −45 −30 mV Temperature Coefficient −100 µV/°C Input Bias Current 250 nA Input Voltage Range OVPR, OCPR, OVPS, and OCPS pins AVEE AVCC − 3 V Differential Input Voltage Range −7 +7 V Rev. B | Page 6 of 41 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS PGIA CHARACTERISTICS PGDA CHARACTERISTICS CC AND CV LOOP FILTER AMPLIFIERS, UNCOMMITTED OP AMP, AND VSET BUFFER VINT BUFFER CURRENT SHARING AMPLIFIER COMPARATORS REFERENCE CHARACTERISTICS THEORY OF OPERATION INTRODUCTION PROGRAMMABLE GAIN INSTRUMENTATION AMPLIFIER (PGIA) Gain Selection Reversing Polarity When Charging and Discharging PGIA Offset Option Battery Reversal and Overvoltage Protection PROGRAMMABLE GAIN DIFFERENCE AMPLIFIER (PGDA) CC AND CV LOOP FILTER AMPLIFIERS COMPENSATION VINT BUFFER MODE PIN, CHARGE AND DISCHARGE CONTROL OVERCURRENT AND OVERVOLTAGE COMPARATORS CURRENT SHARING BUS AND IMAX OUTPUT APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION POWER SUPPLY CONNECTIONS POWER SUPPLY SEQUENCING POWER-ON SEQUENCE POWER-OFF SEQUENCE PGIA CONNECTIONS Current Sensors Optional Low-Pass Filter PGDA CONNECTIONS Reverse Battery Conditions BATTERY CURRENT AND VOLTAGE CONTROL INPUTS (ISET AND VSET) LOOP FILTER AMPLIFIERS CONNECTING TO A PWM CONTROLLER (VCTRL PIN) OVERVOLTAGE AND OVERCURRENT COMPARATORS STEP BY STEP DESIGN EXAMPLE Step 1: Design the Switching Power Converter Step 2: Identify the Control Voltage Range of the ADP1972 Step 3: Determine the Control Voltage for the CV Loop and the PGDA Gain Step 4: Determine the Control Voltage for the CC Loop, the Shunt Resistor, and the PGIA Gain Step 5: Choose the Control Voltage Sources Step 6: Select the Compensation Devices ADDITIONAL INFORMATION EVALUATION BOARD INTRODUCTION FEATURES AND TESTS TESTING THE AD8450-EVALZ PGIA and Offset PGIA Gain Test PGIA in an Application Simple Offset Test Offset in an Application PGDA and Offset Simple Test PGDA in an Application PGDA Offset Overload Comparators VSET Buffer CV and CC Loop Filter Amplifiers CC and CV Integrator Tests Uncommitted Op Amp USING THE AD8450 SCHEMATIC AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE