Datasheet CD4098BMS (Intersil) - 8

制造商Intersil
描述CMOS Dual Monostable Multivibrator
页数 / 页11 / 8 — Logic Diagram. VDD. 4 (12) *. +TR. 5 (11). -TR. 3 (13). RESET. * 2 (14). …
修订版2017-12-22
文件格式/大小PDF / 327 Kb
文件语言英语

Logic Diagram. VDD. 4 (12) *. +TR. 5 (11). -TR. 3 (13). RESET. * 2 (14). RXCX. 1 (15). VSS. 6 (10). 7 (9). NOTE: SCHEMATIC SHOWN IS 1/2 OF TOTAL

Logic Diagram VDD 4 (12) * +TR 5 (11) -TR 3 (13) RESET * 2 (14) RXCX 1 (15) VSS 6 (10) 7 (9) NOTE: SCHEMATIC SHOWN IS 1/2 OF TOTAL

该数据表的模型线

文件文字版本

CD4098BMS
Logic Diagram VDD 4 (12) * D Q +TR C * 5 (11) R1 R2 -TR VDD * 3 (13) RESET * 2 (14) RXCX 1 (15) 8 VSS VSS 16 VDD Q 6 (10) 7 (9) Q VDD NOTE: SCHEMATIC SHOWN IS 1/2 OF TOTAL PACKAGE. TWO SETS OF TERMINAL *ALL INPUTS ARE PROTECTED NUMBERS ARE SHOWN. TERMINALS BY CMOS PROTECTION 1, 8, AND 15 ARE ELECTRICALLY NETWORK CONNECTED INTERNALLY. VSS FIGURE 1. LOGIC DIAGRAM Typical Performance Characteristics AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC A) (m 30 GATE-TO-SOURCE VOLTAGE (VGS) = 15V IOL) 15.0 T ( N GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 E 12.5 RR CU 20 10.0 INK) 10V (SINK) CURRENT (IOL) (mA) 15 7.5 10V OW L 10 5.0 5 5V 2.5 OUTPUT OUTPUT LOW (S 5V 0 5 10 15 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS CHARACTERISTICS
FN3332 Rev 0.00 Page 8 of 11 December 1992