Datasheet OP262-EP (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 15 MHz, Rail-to-Rail, Dual Operational Amplifier |
| 页数 / 页 | 12 / 9 — VS = 5V. A = 25°C. GAIN. 0.1%. 0.01%. S = 5V. TA = 25°C. rees). PHASE. … |
| 文件格式/大小 | PDF / 239 Kb |
| 文件语言 | 英语 |
VS = 5V. A = 25°C. GAIN. 0.1%. 0.01%. S = 5V. TA = 25°C. rees). PHASE. 135. EP T. 180. HAS P. –10. 225. –20. 270. –30. 100k. 10M. 100M. 200. 400. 600. 800. 1000
该数据表的模型线
文件文字版本
OP262-EP
50 4 VS = 5V 40 T 3 A = 25°C GAIN 0.1% 0.01% V 30 45 2 S = 5V TA = 25°C rees) 20 ) 90 1 ) PHASE eg B (V d (D E ( T Z 10 135 0 IN IF SI H GA S EP T 0 E 180 S –1 HAS P –10 225 –2 0.1% 0.01% –20 270 –3 –30
9
–4
2
100k 1M 10M 100M
01 02 6-
0 200 400 600 800 1000
6-
FREQUENCY (Hz)
25
SETTLING TIME (ns)
25 09 09 Figure 14. Open-Loop Gain and Phase vs. Frequency (No Load) Figure 17. Step Size vs. Settling Time
60 60 VS = 5V VS = 5V TA = 25°C TA = 25°C V 50 OUT = ±50mV 40 RL = 830Ω RL = 10kΩ ) CL = 5pF B d ( ) 40 IN % 20 GA OOT ( 30 +OS OOP H S -L R D 0 E E –OS OV 20 OS L C –20 10 –30
0
0
3
10k 100k 1M 10M 100M
02 02 6-
10 100 1000
6-
FREQUENCY (Hz)
25
CAPACITANCE (pF)
25 09 09 Figure 15. Closed-Loop Gain vs. Frequency Figure 18. Small-Signal Overshoot vs. Capacitance
5 70 VS = 5V T ) 60 A = 25°C -p 4 p ) (V 50 G / Hz IN V 3 n ( SW Y 40 T U IT P T NS U 30 2 DE E M O VS = 5V IS MU A 20 VCL = 1 NO XI R 1 L = 10kΩ MA CL = 15pF 10 TA = 25°C DISTORTION<1% 0
1
0
4
10k 100k 1M 10M
02 02 6-
1 10 100 1k
6-
FREQUENCY (Hz)
25
FREQUENCY (Hz)
25 09 09 Figure 16. Maximum Output Swing vs. Frequency Figure 19. Voltage Noise Density vs. Frequency Rev. 0 | Page 9 of 12 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
50 4 VS = 5V 40 T 3 A = 25°C GAIN 0.1% 0.01% V 30 45 2 S = 5V TA = 25°C rees) 20 ) 90 1 ) PHASE eg B (V d (D E ( T Z 10 135 0 IN IF SI H GA S EP T 0 E 180 S –1 HAS P –10 225 –2 0.1% 0.01% –20 270 –3 –30
9
–4
2
100k 1M 10M 100M
01 02 6-
0 200 400 600 800 1000
6-
FREQUENCY (Hz)
25
SETTLING TIME (ns)
25 09 09 Figure 14. Open-Loop Gain and Phase vs. Frequency (No Load) Figure 17. Step Size vs. Settling Time
60 60 VS = 5V VS = 5V TA = 25°C TA = 25°C V 50 OUT = ±50mV 40 RL = 830Ω RL = 10kΩ ) CL = 5pF B d ( ) 40 IN % 20 GA OOT ( 30 +OS OOP H S -L R D 0 E E –OS OV 20 OS L C –20 10 –30
0
0
3
10k 100k 1M 10M 100M
02 02 6-
10 100 1000
6-
FREQUENCY (Hz)
25
CAPACITANCE (pF)
25 09 09 Figure 15. Closed-Loop Gain vs. Frequency Figure 18. Small-Signal Overshoot vs. Capacitance
5 70 VS = 5V T ) 60 A = 25°C -p 4 p ) (V 50 G / Hz IN V 3 n ( SW Y 40 T U IT P T NS U 30 2 DE E M O VS = 5V IS MU A 20 VCL = 1 NO XI R 1 L = 10kΩ MA CL = 15pF 10 TA = 25°C DISTORTION<1% 0
1
0
4
10k 100k 1M 10M
02 02 6-
1 10 100 1k
6-
FREQUENCY (Hz)
25
FREQUENCY (Hz)
25 09 09 Figure 16. Maximum Output Swing vs. Frequency Figure 19. Voltage Noise Density vs. Frequency Rev. 0 | Page 9 of 12 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE