TABLE I. Electrical performance characteristics – Continued. Conditions Test Symbol -55°C ≤ TA ≤ +125°C Group A Device Limits 1/ Unit R subgroups type L = 150 Ω unless otherwise specified Min Max Output current IOUT VS = ±5 V and ±15 V 1,2,3 01 30 mA Power supply quiescent IQ VS = ±5 V 1 01 7.5 mA current VS = ±15 V 8.0 VS = ±5 V and ±15 V 2,3 11.0 Power down current IDN VS = ±5 V 1 01 2.3 mA VS = ±15 V 2.8 VS = ±5 V 2,3 3.5 VS = ±15 V 4.0 Disable pin current 3/ I 1 01 75 µA LOGIC DISABLE pin = 0 V, VS = ±5 V, TA = +25°C DISABLE pin = 0 V, 400 VS = ±15 V, TA = +25°C Input resistance 3/ +RIN VS = ±15 V, TA = +25°C 4 01 2.5 MΩ Minimum DISABLE 3/ ID VS = ±5 V and ±15 V 1 01 10 40 µA pin current to disable Bandwidth at 3 dB 3/ BW A 4 01 40 MHz V = +2, RFB = 715 Ω, VS = ±5 V, TA = +25°C A 55 V = +2, RFB = 715 Ω, VS = ±15 V, TA = +25°C Bandwidth at 0.1 dB 3/ BW A 4 01 13 MHz V = +2, RFB = 715 Ω, VS = ±5 V, TA = +25°C A 15 V = +2, RFB = 715 Ω, VS = ±15 V, TA = +25°C Full power bandwidth 3/ FPBW V 4 01 8 MHz S = ±15 V, VOUT = 20 VPP, RL = 400 Ω, TA = +25°C See footnotes at end of table. STANDARD SIZE 5962-93132MICROCIRCUIT DRAWINGA DLA LAND AND MARITIME REVISION LEVEL SHEET COLUMBUS, OHIO 43218-3990 C 6 DSCC FORM 2234 APR 97 Document Outline DEPARTMENT OF DEFENSE SPECIFICATION DEPARTMENT OF DEFENSE STANDARDS